Schematics

FCC ID: Z64EXP4F5137R9

Schematics

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FCCID_1899550

1 2 3 4 5 6 7 8 DVCC CON1 CON2 CON3 CON4 CON5 RVCC_1 AVCC 1 2 1 2 1 2 1 2 1 2 CON7 3 4 3 4 3 4 3 4 3 4 C551 C554 1 2 C4 5 6 5 6 5 6 5 6 5 6 12pF 12pF 3 4 CON9 0.1uF R551 R554 A 7 8 7 8 7 8 7 8 7 8 5 6 1 2 A C2 7 8 3 4 Q3 C3 Port 1 Port 2 Port 3 Port 4 Port 5 Q2 5 6 0.1uF 0.1uF 7 8 32.768k 32.768k 0R 0R 1 2 R1 0R JP7 P4.6 P4.7 P4.5 P4.3 P4.1 P5.0 P5.2 P5.4 P5.6 P5.7 P5.5 P5.3 P5.1 P5.0 P5.1 P5.0 P5.1 P1.0 P1.2 P1.4 P1.6 P1.7 P1.5 P1.3 P1.1 P2.0 P2.2 P2.4 P2.6 P2.7 P2.5 P2.3 P2.1 P3.0 P3.2 P3.4 P3.6 P3.7 P3.5 P3.3 P3.1 P4.0 P4.2 P4.4 UNINSTALLED P1.6 P1.5 PORT_BUS JTAG_BASE JTAG SBW CON8 DVCC Test 4 6 1 2 2 JP1A TDI 3 4 For BSL usage add: VCC R231 R221 TMS 5 6 placed 0ohms 0ohms TCK 1 3 5 7 8 R5 R4 JP5 R2 D1 external supply voltage: 0ohms DNP 1 2 B P1.0 internal supply voltage: DNP 0ohms B 3 4 330R SMD LED LAMP(GREEN) R511 S1 C511 5 6 JTAG 47k 7 8 S2 CON11 2.2nF JP1 1 2 1 B3U-1000P VCC 0R R4 R5 P1.7 JTAG Matrix 3 4 2 0R 5 6 3 R231 R221 0R 0R B3U-1000P R3 7 8 JP2 BOOST 9 10 CON10 D2 330R BSLTX JP10 R6 11 12 1 2 P3.6 13 14 BSLRX 3 4 PORT_BUS 5 6 330R SMD LED LAMP(Red) 7 8 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 P5.0 P5.1 (May be added close to the 9 10 respective pins to reduce DVCC 2pF C48 AVCC emissions at 5GHz to level required by ETSI) 2pF C47 P2.0/CB0/A0 64 P2.1/CB1/A1 63 P2.2/CB2/A2 62 P2.3/CB3/A3 61 P2.4/CB4/A4/VREF-/VEREF-60 P2.5/CB5/A5/VREF+/VEREF+59 P2.6/CB6/A6 58 P2.7/CB7/A7 57 AVCC 56 P5.0/XIN 55 P5.1/XOUT 54 AVSS 53 DVCC 52 NRST/NMI/SBWTCK 51 TEST/SBWTCK 50 PJ.3/TCK 49 C 2pF C46 C C041 4.7uF C411 DVCC P1.7 1 1.5pF P1.7/R03(ROSC) PJ.2/TMS 48 P1.6 2 P1.6/R13/LCDREF PJ.1/TDI/TCLK 47 CON6 P1.5 3 P1.5/R23 PJ.0/TDO 46 R441 C412 C414 SMA1 1 2 4 LCDCAP/R33 GUARD 45 RVCC L411 L412 L413 L415 RF-SINGLE 3 4 5 COM0 R_BIAS 44 1 5 6 P5.7 6 P5.7/COM1/S26 AVCC_RF 43 12nH 18nH 15nH 15nH P5.6 56k/1% C401 7 AVCC_RF 42 1.5pF SMA 5 4 3 2 7 8 P5.6/COM2/S25 1pF 1.5pF P5.5 8 P5.5/COM3/S24 U1 RF_N 41 P5.4 9 P5.4/S23 RF_P 40 10 CC430F6147 C413 VCORE AVCC_RF 39 11 C402 L414 8.2pF DVCC DVCC AVCC_RF 38 RVCC L401 P1.4 12 2.2nH P1.4/S22 RF_XOUT 37 C1 C101 P1.3 13 P1.3/S21 RF_XIN 36 12nH 0.1uF 0.47uF P1.2 P5.2 14 P1.2/S20 P5.2/S0 35 1.5pF P1.1 15 P1.1/S19 P5.3/S1 34 P5.3 L402 P1.0 16 P1.0/S18 P4.0/S2/RF_ATEST) 33 P4.0 Q1 18nH D D P3.7/S17 P3.6/S16 P3.5/S15 P3.4/S14 P3.3/S13 P3.2/S12 P3.1/S11 P3.0/S10 26MHz P4.7/S9 P4.6/S8 P4.5/S7 P4.4/S6 P4.3/S5 P4.2/S4 P4.1/S3 DVCC EPAD C403 C361 C371 100pF RVCC Decoupling RF VCC L451 RVCC_1 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 65 27pF 27pF DVCC AVCC 12nH C451 C431 C421 C391 C392 C381 DVCC 0.1uF 0.1uF 0.1uF 0.1uF 2pF 0.1uF P3.7 P3.6 P3.5 P3.4 P3.3 P3.2 P3.1 P3.0 P4.7 P1.1 P4.6 P4.5 P4.4 P4.3 P4.2 P4.1 C111 C112 C251 C252 C521 C522 C561 C562 P5.4 1uF 0.1uF 1uF 0.1uF 1uF 0.1uF 1uF 0.1uF VCC JP3 1 1 1 2 JP9 2 2 VCC_1 DVCC C5 0.1uF AVCC RVCC_1 3 L2 U2 2.2uH 1 CON13 JP4 E CON12 TPS62730 E 1 3 2 1 1 STAT FB 6 3 2 JP8 AGND 2 4 1 JP6 2 SW ON/BYP 5 2 R7 0R TI Internal Data MSP430 3 3 VIN GND 4 APCB1PCB EM430F6147RF900 Rev3.4 or 3.4S C9 C7 Comment: TI Freising U1# Socket for U1 (only for PCB Version 3.4S) uninstalled 2.2uF L1 12nH XJMP 14x Jumper/Shunt see Jumperlist C8 Date: Name: 1210 AVT1 Fiducial Mark Top-Seite AVT2 Fiducial Mark Top-Seite 2.2uF Design:06.JUL.11 Cl.Kuch EM430F6147RF900 AVT3 Fiducial Mark Top-Seite ** Correspondig Layout Revisions: Appr.: 06.JUL.11 Cl.Kuch Title of Schematic AVB1 Fiducial Mark Bottom-Seite AVB2 Fiducial Mark Bottom-Seite 4.0 : U1 direct soldered Rev.: Drawing#: Revision: see ** AVB3 Fiducial Mark Bottom-Seite ABO1 ABO2 Page: 1 of 1 4.0S : U1 with Socket, Soldermask zone File: EM430F6147RF900_4_0_(S)Schematic.sch Mentor Pads Logic V9 Size: A3 1 2 3 4 5 6 7 8


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Document Created: 2013-02-02 17:27:00
Document Modified: 2013-02-02 17:27:00
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