Block Diagram

FCC ID: XPYNINAB1

Block Diagram

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FCCID_3113494

                                                                              Registered office:
                                                                              u-blox AG
                                                                              Zürcherstrasse 68
RE:     Certification Application                                             8800 Thalwil
                                                                              Switzerland
Product family:         NINA-B1
HVIN:                   NINA-B111 and NINA-B112                               Company number: CH-020.3.020.161-7
FCC ID:                 XPYNINAB1
                                                                              info@u-blox.com
IC:                     8595A-NINAB1                                          support@u-blox.com




Block Diagram of OEM-BLE module NINA-B1


                  (NINA-B112)                          1.3 V
                  Integrated
                   Antenna                                                 1.7 – 3.6 V (VCC)
                                           System                 DC/DC
                                           power                  /LDO
                                                                          1.7 – 3.6 V (VCC_IO)

                                              Bluetooth Low Energy           External Reset
        ANT-pin                                   RF Transceiver
                                                      with                       UART
     (NINA-B111)                                Integrated Stacks
                                                    Application                    SPI
                                                     Processor
                                                     Memory                       ADC

                                                                                  NFC

                                                                                GPIO(s)



                                              32 MHz       32.768 kHz


Figure-1 – NINA-B1 block diagram.




locate, communicate, accelerate



Document Created: 2016-08-09 16:58:13
Document Modified: 2016-08-09 16:58:13

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