4

FCC ID: NTS00025302YA

Block Diagram

Download: PDF
FCCID_92

FCC ID NTSO0025302YA 4. BLOCK DEAGRAM(S) OF EQUIPMENT Figure 4.1 Block Diagram of SMIF ArteAr | 6i 2 D to D31 # m 3 8 ¥ Y¥ 4 0 2 § & 6 s§ 1081 g 9 g 3 hi B. & 3 E& 5 & 8 E »| 3 2 »| é a6 g as 2 Z iR 6 O 3 AS3 to RAS4 A Rasz io RASg % C53, EBPCS. EEPCLE EEPDAT kib TXD. RST. DTR & in r— rsanr connepror The Dynamic Random Access Memory ( DRAM ) is refreshed every 13.2u8 by the 28MHz Central Processing Unit ( CPU ) NOTE: The CPU is not attached to this PCB but to the main control board within the Printer

Commercial In Confidence Report Number: 4215 / 1600 / A /TR Tested by : B. Tait Date : 24th October 1997. Appendix C EUT CONFIGURATION PRINTER LAPTOP PC SERIAL INTERFACE CABLE 110 VAC, 60 Hz AC ADAPTER 110 VAC, 60 Hz Fig 2. Block diagram.


Document Created: 2001-07-16 17:29:02
Document Modified: 2001-07-16 17:29:02
© 2025 FCC.report
This site is not affiliated with or endorsed by the FCC