Block Diagram

FCC ID: IAJBE139

Block Diagram

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FCCID_677656

BLOCK DIAGRAM FOR READER V Z7 L1,.Ci,rel L2,C2,1T52 13.56MHz OSCILLATOR AND 1/ RF AMP —> SWITCH RECEIVER @3.910,011 — x2 aros Q12 [o CCC TT TCO TT CCTCTICCT t : SLOCK DIAGRAM FOR TAGS t t 1 7 | 1 us t RFID Z i LED1,2.3,4 CATA AMP 1 i TRANSPONDER L14 1 1 U4 i 1 i i t ho un uon n en e e h en e e e e e ek_ze 1 sp1 YDICE SYNTHESIZER AUDIOD AMP. wotor oriver a eit opu (GMHz) a7,.08 04.05 | ut KEY §1,52,83,94,54 56,57,.58,5B,5 10 $13.514,515.516 512A MODEL NO: BE—139 BZE REV: SL {'«! dcs‘.i-ms 0.1 DATE SHEET |

U1 HT86384 Block Diagram oo _ sys cik4 ——] STACKO INT <4— C tmRo STACK1 % - <——B PoarmrRo STACK2 L_nj -TMROC Program STACK3 Interrupt [~I 16 bit * Counter STACK4 Circuit L—N STACKS ¥ SyS CLWA4 Program STACKE intc} | rom [ < STACKT |wte} — mir1 * <——[X PCSTMR1 1L C > |TMR1G ~ © L———l 16 bit Instruction Register MPO M DATA wWDT RC | [ U Memory OoSsC ( P X WDT Prescaler | @ SYS CLK4 [ CA Pec} rortc, & e 4 »B pco—rcs Instruction PC Decoder J PBC|_ports »K pBo—PB7 TTTT ALU »] STATUS C rs Timing Shifter 1t Generation fi —=] Pac] rorta Ab + »X pao~PA7 l ; 7 ) pa HA osc2 osci ACC RES TMR2 i— SYS CLK/4 iL vDoD HALT EN/DIS i vss LVOILVR TMRz2C 1 16—bit SYS CLK/4 32768Hz Crystal {M—— {XIN and XOUT) K B—stage Prescaler *) [mrse TMR3C B—bit 3—bit n 12—bit ) Volume D/A Control

U3 HT82V732 Block D_iagr"am OUT1 O<4———— | ' IN1— O—»>/~ § IN1+ : + -—-.__*’Q. OUT2 ; VSS O—» Sinz— ; : vopC—> DINz+ | I i ? Block Diagram nead _bad ‘ System VCC Limiter / Clock |< and QOVDD Generator RF Limiter Frequenc Data | |, Power ON HF1 Driver foveld Processing Reset l F Test and PWMIASK shit |, Data e ——IProgramiming buvss Modulator fi Register EPROM Gontrol VPA CLK


Document Created: 2006-06-27 19:19:07
Document Modified: 2006-06-27 19:19:07
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