Block Diagram

FCC ID: ZATZLLRC

Block Diagram

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FCCID_2080520

ADC I AAF LNA DEMODULATOR Q ADC I Q ADC CLOCK RADIO RF_P FREQUENCY SYNTHESIZER CONTROLLER CTRL Balun RF_N f_internal = <4810MHz – 4960MHz> AND f_output = <2405MHz – 2480MHz> DATA INTERFACE I Q DAC I LPF PA MODULATOR Q DAC f = <2405MHz – 2480MHz> CR2025 Battery 16MHz RC-OSC CLOCK MUX 32kHz RC-OSC 3.0V 2.1V DC/DC CC2530 32MHz Crystal OSC Sat Level Hue Power indicator indicator indicator indicator P2.0 P1.2 P1.3 P1.1 DCDC Control Port 0 P1.0 XOSC_Q2 XOSC_Q1 P2.3 3x5 button Buzzer matrix ZLLRC


Document Created: 2013-08-29 16:10:59
Document Modified: 2013-08-29 16:10:59
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