Block Diagram

FCC ID: ZAT2545EM

Block Diagram

Download: PDF
FCCID_1694628

ADC I AAF LNA DEMODULATOR Q ADC I Q ADC CLOCK RADIO RF_P FREQUENCY SYNTHESIZER CONTROLLER CTRL BALUN RF_N f_internal = <4800MHz – 4960MHz> AND f_output = <2400MHz – 2480MHz> DATA INTERFACE I Q DAC I LPF PA MODULATOR Q DAC f = <2400MHz – 2480MHz> 16MHz RC-OSC CLOCK MUX 32kHz RC-OSC 32.768kHz 32MHZ Crystal OSC Crystal OSC XOSC_Q2 XOSC_Q1 P2_4 P2_3


Document Created: 2012-04-16 15:23:19
Document Modified: 2012-04-16 15:23:19
© 2025 FCC.report
This site is not affiliated with or endorsed by the FCC