Cover Letter

FCC ID: SJC-ETERNA2

Cover Letter(s)

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FCCID_1866538

October 7, 2012 Federal Communications Commission 7435 Oakland Mills Road Columbia, MD 21046 Ref: Eterna Maximum Duty Cycle over a 100 ms window Dear Examiner, Dust radios operate on a TDMA time schedule consisting of a continuous sequence of a minimum of 7.25 ms timeslots. In each timeslot radio’s will do one of the following: 1) Remain inactive 2) Transmit a packet and potentially receive an acknowlege 3) Potentially receive a packet and transmit an acknowlege When transmitting a packet, transmission duration during a timeslot varies as a function of the payload, with a maximum of 128 bytes. When receiving a packet the transmitted acknowledgement will be a maxium of 27 bytes. During network operation radios receive three times, for every transmit slot, and as a result the maximum possible duty cycle is created with the following sequence: 1) Transmit 2) Acknowledge 3) Acknowledge 4) Acknowledge 5) Transmit 6) Acknowledge 7) Acknowledge 8) Acknowledge 9) Transmit 10) Acknowledge 11) Acknowledge 12) Acknowledge 13) Transmit A radio transmit consists of 4 stages: 1) Initialization: radio is prepared for transmit (transmitter is off) 2) Ramp up: transmitter is ramped to peak power 3) Transmit: from 0 to 128 bytes of data maximum + 5 bytes preamble/SFD 4) Ramp down: radio transmitter is turned off, Where the data rate is 250 kbps +/‐ 40 ppm, or 32 us/byte. Ramp up and ramp down of the takes 77 us. Given the frequency of the messages the maximum duty time the radio can be transmitting over a 100 ms is: phone: 510. 400. 2900 | fax: 510. 489. 3799 |30695 Huntwood Avenue, Hayward, California 94544 | www.dustnetworks.com

Max Tx on = 4*Transmit [128 bytes] + 12*Acknowledge = 4*[(128+5)*32us + 77us] + 9*[(24+5)*32us + 77us] = 4*[4.333 ms] + 12*[1.101 ms] = 27.241 ms Maximum duty cycle is therefore: 27.241 ms on / 100 ms = 27.241 % For reference a zero span capture of a 128 byte packet followed by three acknowledges and a 2nd 128 byte packet is shown in Figure 1:. Figure 1: Eterna Radio Timeslot transmision sequence Tx, Ack, Ack, Ack, Tx Sincerely yours, Gordon Charles Director of VLSI / Hardware Dust Networks, Inc. page 2


Document Created: 2012-10-07 22:27:51
Document Modified: 2012-10-07 22:27:51
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