Block Diagram

FCC ID: SF4-BTDF414

Block Diagram

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FCCID_2524316

Functional Block Diagram SPI_DEBUG I2C PIO Serial Flash UART R G B USB XTAL AIO[0] 3 01 I 2C/SPI LED PWM 26MHz SPI Serial Flash UART USB v2.0 Master Control and ,2 (Debug) Interface 4Mbps Full-speed Clock /Slave Output AUX ADC Generation 09 3.3V PIO Port er ob DMA ports Bluetooth Modem ct TX ,O DMA ports Bluetooth Bluetooth Radio BT_RF ay Baseband and Balun CSR8615 RX sd System ne RAM CSR8615 QFN Data Sheet ed -W LINE/MIC_AN High-quality ADC LINE/MIC_AP n LINE_BN .c Memory High-quality ADC Management LINE_BP om Unit SPKR_AN High-quality DAC .c SPKR_AP m DMA ports om Audio Interface ec VDD_AUDIO ROM ch VDD_AUDIO_DRV pa MIC Bias MIC_BIAS -a Voltage / Temperature Monitor ao Switch Ts PIO Port es VBAT am PM 0.85V to SENSE VBAT_SENSE 80MHz MCU PMU 1.35V 1.35V 1.2V 1.8V 1.35V Interface Low-voltage Low-voltage Li-ion Low-voltage Switch- Switch- Bypass rj DM1 80MHz DSP PCM1 / I 2S and VDD_ANA VDD_AUX Charger VDD_DIG mode mode LDO CHG_EXT BIST Linear Linear fo VM Accelerator Linear Regulator Regulator Engine Regulator Regulator DM2 (MPU) Regulator VCHG ed SENSE SENSE SENSE SENSE SENSE ar ep Digital Audio VREGIN_DIG VDD_DIG VDD_BT_RADIO VDD_ANA VDD_AUX_1V8 VDD_AUX LXL_1V8 SMPS_1V8_SENSE LX_1V35 SMPS_1V35_SENSE 3V3_USB Pr G-TW-0012995.2.2 Production Information Page 5 of 104 © Cambridge Silicon Radio Limited 2013 CS-303726-DSP4 Confidential Information - This Material is Subject to CSR's Non-disclosure Agreement www.csr.com


Document Created: 2014-12-04 15:57:24
Document Modified: 2014-12-04 15:57:24
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