Operational description

FCC ID: S9NZB32C1

Operational Description

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FCCID_1573686

                                                                  SPZB32Wxy1.z

               802.15.4 ZigBee® modules based on the STM32W chipset

Features
■   2.4 GHz IEEE 802.15.4-compliant SMD
    modules based on the ST STM32W chipset
    solution featuring:
    – Integrated 2.4 GHz transceiver
    – PHY and MAC IEEE 802.15.4 features
    – Integrated ARM® Cortex-M3 core
    – Integrated embedded Flash and RAM
    – Integrated encryption (AES-128)
       accelerator
■   Power amplified RF performances:
    – Up to 20 dBm nominal TX output power
    – Up to 105 dBm RX sensitivity
                                                            T
                                             AF
■   Robust Wi-Fi and Bluetooth® coexistence
■   16 channels (IEEE 802.15.4 channel 11 to 26)
■   Multiple configurable interfaces available
    (UART, SPI, I2C, ADC, GPIOs)
■   Industry standard JTAG programming
■   Onboard 24 MHz and 32.768 kHz stable Xtal
                                      R

■   Less than 2 uA typ power consumption in deep
    sleep mode (32.768 Xtal)
■   Multiple antenna options: integrated antenna or
    integrated UFL connector
                            D



■   Multiple Protocol Stack Options
■   Single voltage supply (2.1 to 3.6 V)
■   FCC and CE compliant qualified
■   Small Form Factor : 16.4 x 26.5 mm
■   Operating temperature range: -40 °C to +85 °C




28 July 2011                                 Doc ID xxxxx Rev 1                1/19
                                                                          www.st.com   19


Contents                                                                                                   SPZB32Wxy1.z


Contents

1          Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2          RoHS compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3          Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

4          Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

5          Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
           5.1      Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
           5.2      Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

6

                                                                     T
           Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
           6.1      Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
                                                 AF
           6.2      Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
           6.3      DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
           6.4      Digital I/O specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
           6.5      RF electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

7          Mechanical dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
                                       R


8          Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
                            D



9          Product approvals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
           9.1      FCC approvals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
                    9.1.1       FCC labeling requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
           9.2      European certification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

10         Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

11         Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18




2/19                                             Doc ID xxxxx Rev 1


SPZB32Wxy1.z                                                                             Description


1        Description

         SPZB32Wxy1.z is a series of ready-to-use IEEE 802.15.4/ZigBee compliant and power
         amplified RF modules optimized for embedded applications that require low data rate
         communications and high transmission range capabilities based on the STM32W single
         chip that integrates a 2.4 GHz, IEEE 802.15.4-compliant transceiver together with an ARM®
         Cortex embedded processor .
         The modules are very compact and enable OEMs to easily add wireless capabilities to
         electronics devices by optimizing time-to-market, cost, size, and consumption of their target
         applications. No RF experience or expertise is required to add this powerful networking
         capability to the final product.
         24 MHz high stability Xtal is available aboard the modules to perform the timing
         requirements as per IEEE 802.15.4/ZigBee® specifications; additionally a 32.768kHz Xtal is
         also provided onboard for low power operation.
         A single supply voltage is requested to power the modules. The supply is in the range of 2.1
         to 3.6 V. The voltage supply also determines the I/O ports level allowing an easy interface
         with additional peripherals.




                                                        T
         An advanced solution integrating PA and LNA in a single package is aboard to ensure
         excellent power transmission and receiver sensitivity performances.
         To support user defined applications, a number of peripherals such as GPIO, UART, I2C,
                                        AF
         ADC and general purpose timers are available and user selectable.
         The size and footprint of this series of modules is equivalent to that of the series
         SPZB32Wxy2.z to facilitate the evaluation of the different range options on the target
         application.
         The series groups multiple versions that differ in terms of memory size , antenna (ceramic
         antenna or integrated u.fl connector for the connection of an external antenna) and stacks
         options (ZigBee, RF4CE, SimpleMAC).
                                R


         The SPZB32W1y1.z versions are based on the STM32W108CB chipset integrating 128 kB
         of embedded flash memory and 8 kB of RAM available for data and program storage.
         For technical details on the STM32W108CB chipset refer to the related datasheet. For
         technical details on the supported stacks refer to the related user guide and application
                       D



         notes.




                                        Doc ID xxxxx Rev 1                                           3/19


RoHS compliance                                                           SPZB32Wxy1.z


2         RoHS compliance

          ST modules are RoHS compliant and comply with ECOPACK® norms.




3         Application

          ●   Smart energy applications
          ●   Machine2Machine industrial control
          ●   Wireless sensor networks
          ●   Home/building automation
          ●   Smart appliances
          ●   Wireless alarms and security systems
          ●   Lighting control
          ●   Remote monitoring



                                                        T
                                         AF
                                 R
                        D




4/19                                     Doc ID xxxxx Rev 1


SPZB32Wxy1.z                                                             Block diagram


4        Block diagram

         Figure 1.   SPZB32WxA1.z block diagram



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                      *TAG
                                                           ,.!   "0&
                                       34- 7 3OC
                                                           0!
                3YSTEM 3IGNALS




                                                                                   ".W


         Figure 2.   SPZB32WxC1.z block diagram



                      6DD           K(Z
                                   8TAL           T
                                                  - (Z
                                                  8TAL
                                   AF
                     '0)/S


                      *TAG
                                                           ,.!           5&)
                                       34- 7 3O#               "0&
                                                           0!         #ONNECTOR
                3YSTEM 3IGNALS
                                 R

                                                                                   ".W
                       D




                                   Doc ID xxxxx Rev 1                                 5/19


Pin settings                                                      SPZB32Wxy1.z


5              Pin settings

5.1            Pin connections
               Figure 3.   Pin connection diagram



                                                        Antenna




                                                         T
                                          AF
                                   R


                                                    TOP VIEW           AM09235V1
                            D




6/19                                      Doc ID xxxxx Rev 1


                     5.2         Pin description




                                                                                                                                                                   SPZB32Wxy1.z
                     Table 1.    Pin description
                      Module pin n°      Pin name   Direction STM32W pin                                         Description

                                            PB5       I/O        43        Digital I/O
                                           ADC0      Analog      43        ADC Input 0
                            1
                                         TIM2CLK       I         43        Timer 2 external clock input
                                         TIM1MSK       I         43        Timer 1 external clock mask input
                                            PA5
                                           ADC5
                                                    D I/O
                                                     Analog
                                                                 27
                                                                 27
                                                                           Digital I/O
                                                                           ADC Input 1
                            2            PTI_DATA
                                       nBOOTMODE
                                                       O
                                                       I
                                                              R  27
                                                                 27
                                                                           Frame signal of PTI (Packet Trace Interface)
                                                                           Embedded serial bootloader activation out of reset
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                                                                      AF
                                       TRACEDATA3      0         27        Synchrounus CPU trace data bit 3
                                            PA4       I/O        26        Digital I/O
                                           ADC4      Analog      26        ADC Input 0
                            3
                                          PTI_EN       O         26        Frame signal of PTI (Packet Trace Interface)




                                                                                                T
                                       TRACEDATA2      O         26        Synchrounus CPU trace data bit 2
                                            PA3       I/O        25        Digital I/O
                                         SC2nSSEL      I         25        SPI SLAVE SELECT of Serial Controller 2
                            4
                                         TIM2_CH2     I/O        25        Timer 2 channel 2 output (or input - Disable remap with TIM2_OR[5])
                                        TRACECLK       O         25        Synchrounus CPU trace clock
                            5             nRESET       I         12        Active low reset ( an internal pull-up of 30 kohm typ. is provided)
                                            PB3       I/O        19        Digital I/O
                                        UART_CTS       I         19        UART CTS handshake of Serial Controller 1
                            6




                                                                                                                                                                   Pin settings
                                         SC1SCLK      I/O        19        SPI slaver clock of Serial Controller SC1 / SPI master clock of Serial Controller SC1
                                         TIM2_CH3     I/O        19        Timer 2 channel 3 input / Timer 2 channel 3 output
7/19


                     Table 1.    Pin description (continued)
8/19




                                                                                                                                          Pin settings
                      Module pin n°      Pin name       Direction STM32W pin                                               Description

                                           PB4             I/O         20        Digital I/O
                                        UART_RTS           O           20        UART RTS handshake of Serial Controller 1
                            7
                                         TIM2_CH4          I/O         20        Timer 2 channel 4 input / Timer 2 channel 4 output
                                        SC1nSSEL               I       20        SPI slave select of Serial Controller 1
                                           PA0             I/O         21        Digital I/O




                                                     D
                                         SC2MOSI           O           21        SPI Master data out of Serial Controller 2
                            8
                                         SC2MOSI               I       21        SPI Slave data in of Serial Controller 2
                                         TIM2_CH1          I/O         21        Timer 2 channel 1 input / Timer 2 channel 1 output
                                           PA1
                                         SC2MISO
                                                           I/O
                                                               I
                                                                   R   22
                                                                       22
                                                                                 Digital I/O
                                                                                 SPI Master data in of Serial Controller 2
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                            9            SC2MISO
                                         SC2SDA
                                         TIM2_CH3
                                           PA2
                                                           O
                                                           I/O
                                                           I/O
                                                           I/O
                                                                       22
                                                                       22
                                                                       22
                                                                       24
                                                                             AF  SPI Slave data out of Serial Controller 2
                                                                                 TWI (I2C) data of Serial Controller 2
                                                                                 Timer 2 channel 3 input / Timer 2 channel 3 output
                                                                                 Digital I/O


                           10
                                         SC2SCLK
                                         SC2SCLK
                                         SC2SCL
                                         TIM2_CH4
                                                           O


                                                           I/O
                                                           I/O
                                                               I
                                                                       24
                                                                       24
                                                                       24
                                                                       24
                                                                                                      T
                                                                                 SPI Master clock of Serial Controller 2
                                                                                 SPI Slave clock of Serial Controller 2
                                                                                 TWI (I2C) clock of Serial Controller 2
                                                                                 Timer 2 channel 4 input / Timer 2 channel 4 output
                           11              GND             --          49        Ground
                           12              VDD           Power     16,23,28,37   Input power supply
                                           PC1             I/O         38        Digital I/O




                                                                                                                                          SPZB32Wxy1.z
                                           ADC3          Analog        38        ADC Input 3
                           13
                                           SWO             O           38        Serial Wire Output ayncronous trace output to debugger
                                       TRACEDATA0          O           38        Syncronous CPU trace data bit 0


                     Table 1.    Pin description (continued)




                                                                                                                                                                          SPZB32Wxy1.z
                      Module pin n°       Pin name        Direction STM32W pin                                            Description

                                             PB0            I/O        36        Digital I/O
                                          VREF (O/I)       Analog      36        ADC reference output / ADC reference input
                                          TIM1CLK              I       36        Timer 1 external clock input
                           14
                                          TIM2MSK              I       36        Timer 2 external clock mask input
                                            IRQA               I       36        External interrupt source A




                                                       D
                                         TRACECLK            O         36        Syncronous CPU trace clock
                                             PB1            I/O        30        Digital I/O
                                           SC1TXD            O         30        UART transmit data of Serial Controller 1
                           15         SC1MOSI / SC1MISO
                                           SC1SDA
                                                             O
                                                            I/O
                                                                    R  30
                                                                       30
                                                                                 SPI master data out of Serial Controller 1 / SPI slave data out of Serial Controller 1
                                                                                 TWI (I2C) data of Serial Controller 1
Doc ID xxxxx Rev 1




                           16
                                          TIM2_CH1
                                             PB2
                                          SC1RXD
                                      SC1MISO / SC1MOSI
                                                            I/O
                                                            I/O
                                                               I
                                                               I
                                                                       30
                                                                       31
                                                                       31
                                                                       31
                                                                            AF   Timer 2 channel 1 input / Timer 2 channel 1 output
                                                                                 Digital I/O
                                                                                 UART receive data of Serial Controller 1
                                                                                 SPI master data in of Serial Controller SC1 / SPI slave data in of Serial Controller 1




                           17
                                           SC1SCL
                                          TIM2_CH2
                                            JTCK
                                           SWCLK
                                                            I/O
                                                            I/O


                                                            I/O
                                                               I
                                                                       31
                                                                       31
                                                                       32
                                                                       32
                                                                                                      T
                                                                                 TWI (I2C) clock of Serial Controller 1
                                                                                 Timer 2 channel 2 input / Timer 2 channel 2 output
                                                                                 JTAG clock input from debugger
                                                                                 Serial Wire clock input/output with debugger
                                             PC2            I/O        33        Digital I/O
                           18               JTDO             O         33        JTAG data out to debugger
                                            SWO              O         33        Serial Wire Output asyncronous trace output to debugger
                                             PC3            I/O        34        Digital I/O
                           19




                                                                                                                                                                          Pin settings
                                            JTDI               I       34        JTAG data in from debugger
                                             PC4            I/O        35        Digital I/O
9/19




                           20               JTMS               I       35        JTAG mode select from debugger
                                           SWDIO            I/O        35        Serial Wire bidirectional data to/from debugger


                     Table 1.    Pin description (continued)
10/19




                                                                                                                                                                       Pin settings
                      Module pin n°      Pin name       Direction STM32W pin                                        Description

                                           PC0             I/O       40        Digital I/O (high current)
                                           JRST                I     40        JTAG reset input from debugger
                           21
                                       TRACEDATA1          O         40        Syncronous CPU trace data bit 1
                                           IRQD                I     40        External interrupt source D
                                           PB7             I/O       41        Digital I/O




                                                       D
                                         TIM1_CH2          O         41        Timer 1 channel 2 output
                           22           TIM1 _CH2              I     41        Timer 1 channel 2 input
                                           IRQC                I     41        External interrupt source C
                                           ADC2
                                           PB6             I/O
                                                               I


                                                                   R 41
                                                                     42
                                                                               ADC input 2
                                                                               Digital I/O
Doc ID xxxxx Rev 1




                           23
                                         TIM1_CH1
                                         TIM1_CH1
                                           IRQB
                                           ADC1
                                                           O




                                                         Analog
                                                               I
                                                               I
                                                                     42
                                                                     42
                                                                     42
                                                                     42
                                                                          AF   Timer 1 channel 1 output
                                                                               Timer 1 channel 1 input
                                                                               External interrupt source B
                                                                               ADC input 1




                           24
                                       LNA/ENABLE



                                      PA6/LNA_ENABLE       O
                                                               I     29



                                                                     29
                                                                                                     T
                                                                               Digital input, module firmware dependent, externally forced by the user dedicated
                                                                               firmware. This signal is dedicated to manage the SIGE-SE2432L internal LNA.
                                                                               (HIGH= internal LNA enabled, LOW= internal LNA disabled).
                                                                               Digital output, module firmware dependent, internally forced by application dedicated
                                                                               firmware. This signal is dedicated to manage the SIGE-SE2432L internal LNA. (HIGH=
                                                                               internal LNA enabled, LOW= internal LNA disabled).
                                                                               Digital input, module firmware dependent, externally forced by the user dedicated
                                                                               firmware. This signal is dedicated to manage the SIGE-SE2432L front-end STANDBY
                                       RF_STANDBY              I     18        state.




                                                                                                                                                                       SPZB32Wxy1.z
                                                                               (HIGH= Front-end enabled, LOW= Front-end forced in the STANDBY state).
                           25
                                                                               Digital output, module firmware dependent, internally forced by application dedicated
                                                                               firmware. This signal is dedicated to manage the SIGE-SE2432L front-end STANDBY
                                      PA7/RF_STANDBY       O         18        state.
                                                                               (HIGH= Front-end enabled, LOW= Front-end forced into STANDBY state).


SPZB32Wxy1.z                                                                             Electrical characteristics


6        Electrical characteristics

6.1      Absolute maximum ratings

         Table 2.        Absolute maximum ratings
           Symbol                             Parameter                          Min.              Max.            Unit

                VDD       Module supply voltage                                  - 0.3              3.6             V
                Vin       Input voltage on any digital pin                       - 0.3           Vdd + 0.3          V
                Tstg      Storage temperature                                      -40             +85             °C
                Tsold     Soldering temperature < 10s                                              250             °C



6.2      Recommended operating conditions

         Table 3.        Recommended operating conditions
          Symbol

            VDD
                                     Parameter

                        Module supply voltage
                                                                 T    Conditions

                                                                -40 °C < T < +85 °C
                                                                                           Min. Typ. Max.

                                                                                            2.1     3.3      3.6
                                                                                                                   Unit

                                                                                                                     V
                                              AF
               Tstg     Operating ambient temperature                                       -40              +85    °C



6.3      DC electrical characteristics

         Table 4.        DC electrical characteristics
          Symbol                 Parameter                        Conditions               Min. Typ. Max.          Unit
                                     R


               IRX      RX current                           Vdd = 3.3 V, T= 25 °C           -      20        -     mA
                                                         Po = 18 dBm, Vdd = 3.3 V,
               ITX      TX current                                                           -      120       -     mA
                                                          T = 25 °C, F = 2450MHz
                           D



                        Deep sleep current
               IDS                                           Vdd = 3.3 V, T = 25 °C          -      1.3       -     mA
                        (32.768 kHz oscillator)




                                              Doc ID xxxxx Rev 1                                                    11/19


Electrical characteristics                                                                             SPZB32Wxy1.z


6.4           Digital I/O specifications

Table 5.      Digital I/O specifications
Symbol                   Parameter                     Conditions            Min.          Typ.          Max.       Unit

   VIL     Low level input voltage                 2.1 < Vdd < 3.6 V          0                        0.5 x Vdd     V
   VIH     High level input voltage                2.1 < Vdd < 3.6 V   0.62 x Vdd                         Vdd        V
   Iil     Input current for logic 0               2.1 < Vdd < 3.6 V                                      -0.5      mA
   Iih     Input current for logic 1               2.1 < Vdd < 3.6 V                                      0.5       mA
  Ripu     Input pull-up resistor                                                          30                       kΩ
  Ripd     Input pull-down resistor                                                        30                       kΩ
  VOL      Low level output voltage                                           0                        0.18 x Vdd    V
  VOH      High level output voltage                                   0.82 x Vdd                         Vdd        V
  IOHS     Output source current (standard)                                                                4        mA
  IOLS     Output sink current (standard)                                                                  4        mA




                                                                 T
  IOHH     Output source current (high current)                                                            8        mA
  IOLH     Output sink current (high current)                                                              8        mA
  IOTot    Total output current for I/O                                                                   40        mA
                                                  AF
6.5           RF electrical characteristics

Table 6.      Electrical characteristics
 Symbol                  Parameter                       Conditions                 Min.        Typ.      Max.      Unit
                                          R

           Frequency range                           Vdd = 3.3 V, T= 25 °C          2405                  2480      MHz
   TX      Output power                              Vdd = 3.3 V, T= 25 °C                                 20       dBm
   RX      Sensitivity                               Vdd = 3.3 V, 1 % PER                                 -105      dBm
                                D



                                                            ±5 MHz                                35
           Adjacent channel rejection                                                                               dBm
                                                           ±10 MHZ                                40




12/19                                             Doc ID xxxxx Rev 1


SPZB32Wxy1.z                                                                                     Mechanical dimensions


7        Mechanical dimensions

         Figure 4.      Mechanical dimensions
         


                                                                                     




                                                                                                                               
                                                               
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               6FDOH




                                                                      T
                                
                                                                                                       
                                                        




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                                              AF
                                                                                             
                                

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                                 R

         Figure 5.      Pin land pattern (dimensions in mm)
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                                             Doc ID xxxxx Rev 1                                                                           13/19


Soldering                                                                                 SPZB32Wxy1.z


8           Soldering

            The soldering phase must be carefully executed; in order to avoid undesired melting
            phenomenon, particular attention must be paid to the set-up of the peak temperature.
            Below are some suggestions for the temperature profile based on IPC/JEDEC J-STD-020C,
            July 2004 recommendations

            Table 7.     Soldering
                               Profile feature                           PB free assembly

            Average ramp up rate (TSMAX to TP)                            3 °C / sec max.
                               Preheat
            Temperature min. (TS MIN)                                         150 °C
            Temperature max. (TS MAX)                                         200 °C
            Time (TS MIN to TS MAX) (tS)                                   60 – 100 sec
                      Time maintained above:
            Temperature TL                                                    217 °C
            Time tL
            Peak temperature (Tp)
            Time within 5 °C of actual peak temperature (tP)   T            40 – 70 sec
                                                                            240 + 0 °C
                                                                            10 – 20 sec
                                             AF
            Ramp down rate                                                   6 °C / sec
            Time from 25 °C to peak temperature                           8 minutes max.
                                    R
                           D




14/19                                        Doc ID xxxxx Rev 1


SPZB32Wxy1.z                                                                        Product approvals


9        Product approvals

         This series of modules has been designed to meet national regulations for world wide use.
         Different versions of modules belonging to the same series are orderable as it is specified in
         the Section 10. They differ in terms of integrated memory size and protocol stack enabled
         to run while sharing the same manufacturing , design and radios capabilities. As
         representative of the series from the RF design and radios capabilities, the versions using
         128 kB Flash/8kB RAM and Zigbee PRO Protocol stack (i.e. SPZB32W1A1.1 and
         SPZB32W1C1.1) have been used during the certification tests. The following certifications
         have been obtained.


9.1      FCC approvals
         The SPZB32W1A1.1 device, with integrated antenna, as well as the SPZB32W1C1.1, with
         the antenna specified in Table 8, have been tested and found to comply with the limits for a
         Class B digital device , pursuant to part 15 of the FCC rules. These limits are designed to
         provide reasonable protection against harmful interference in a residential installation.




                                                         T
         This equipment generates, uses and can radiate radio frequency energy and, if not installed
         and used in accordance with the instructions, may cause harmful interference to radio
         communications.
         However, there is no guarantee that interference will not occur in a particular installation. If
                                         AF
         this equipment does cause harmful interference to radio or television reception, which can
         be determined by turning the equipment off and on, the user is encouraged to try to correct
         the interference by one or more of the following measures:
         ●     Reorient or relocate the receiving antenna
         ●     Increase the separation between the equipment and receiver
         ●     Connect the equipment into an outlet on a circuit different from that to which the
               receiver is connected
                                 R


         Consult the dealer or an experienced radio/TV technician for help
         Module type: ZigBee® module          SPZB32W1A1.1 / SPZB32W1C1.1
         FCC-ID: S9NZB32C1
                        D



         Modular type: single modular

         Table 8.      Antenna used for FCC approvals
               ITEM                           Part N°                                Manufacturer

                1                  2010B4844-01 (Titanis Antenna)                      Antenova


         Any changes or modifications not expressed approved by the part responsible for
         compliance could cause the module to cease to comply with FCC rules part 15, and thus
         void the user’s authority to operate the equipment.
         While the applicant for a device into which the SPZB32W1A1.1 or the SPZB32W1C2.1 with
         the antenna specified in Table 8 installed is not required to obtain new authorization for the
         module, this does not preclude the possibility that some other form of authorization or
         testing may be required for the end product.


                                         Doc ID xxxxx Rev 1                                         15/19


Product approvals                                                                   SPZB32Wxy1.z


9.1.1     FCC labeling requirements
          When integrating the SPZB32W1A1.1 / SPZB32W1C1.1 into the final product, il must be
          ensured that the FCC labelling requirements, as specified below, are satisfied.
          Based on the Public Notice from FCC, the product into which our transmitter module is
          installed must display a label referring to the enclosed module.
          The label should use wording such as “Contains Transmitter module FCC ID: S9NZB32C1
          or “Contains FCC ID: S9NZB32C1” , any similar wording that expressed the same meaning
          may be used.
          An example is:
          Contains FCC ID: S9NZB32C1


9.2       European certification
          SPZB32W1A1.1 and SPZB32W1C2.1 devices are CE certified:



                    0051
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          Expert opinion N. xxx-xxxxxx released by IMQ refers to the following normative:
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          Radio: EN300 328: V1.7.1:2006-10
          EMC: EN301 489 17 V2.1.1:2009
          Safety: EN60950-1:2006 + A11:2009
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SPZB32Wxy1.z                                                               Ordering information scheme


10           Ordering information scheme


Table 9.     Ordering information scheme
                                                 SPZB         32Wx          y            1      .z

802.15.4 / ZigBee modules



Memory options:

x --> 1: 128 kB Flash; 8 kB RAM
x --> 2: 256 kB Flash; 16 kB RAM



Antenna options:

y --> A: Integrated ceramic antenna




                                                            T
y --> C: Integrated UFL connector



1: Long TX range
                                             AF
Firmware options:

z --> 1: ZigBee PRO (EmberZnet)
z --> 2: STM ZigBee
z --> 3: RF4CE
                                      R

z --> 4: SimpleMAC
z --> 5: Zigbee IP
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Note:        Check availability of the different versions with your ST sales representative.




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Revision history                                                                  SPZB32Wxy1.z


11         Revision history

           Table 10.         Document revision history
                      Date              Revision                        Changes

                   28-Jul-2011             1          Initial release




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Document Created: 2011-07-28 08:31:46
Document Modified: 2011-07-28 08:31:46

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