Schematic diagram 2 of 2

FCC ID: S9NSTEBCN2V1

Schematics

Download: PDF
FCCID_4135071

1 2 3 4 5 6 U1 0 RESETN VDD_MCU 9 18 VDDA PB0 R15 0 USB VDD_MCU 24 19 BOOT VDD_1 PB1 VDD_MCU 36 20 VDD_2 PB2 R16 Micro USB VDD_MCU 48 39 JTDO VUSB 1 VDD_3 PB3 P1 A 40 U2 2 A VUSB PB4 GND DM P2 VDD_MCU 1 41 GND DP 3 VLCD PB5 P3 GND 44 42 VDD_MCU USBDP 1 6 DP 4 BOOT0 PB6 I/O1. I/O1 P4 43 GND 5 PB7 P5 10 PA0-WKUP1 PB8 45 GND 2 GND VBUS 5 VUSB C1 11 46 PA1 PB9 UART_RX_STM32 12 PA2 PB10 21 USBDM 3 I/O2. I/O2 4 DM 10u G6 G5 G4 G3 G2 G1 UART_TX_STM32 13 22 PA3 PB11 14 25 PA4 PB12 GND 15 26 USBLC6-2P6 PA5 PB13 S4 S3 S2 S1 M2 M1 16 27 PA6 PB14 17 28 PA7 PB15 29 USB ESD Protection PA8 30 7 NRST_MCU PA9 NRST OSC_IN 5 PH0-OSC_IN 31 6 OSC_OUT GND PA10 PH1-OSC_OUT USBDM 32 PA11 B USBDP 33 PA12 P-C13_RTC_AF1-WKUP2 2 Micro USB Connector B JTMS 34 PA13 3 4 PC14-OSC32_IN PC15-OSC32_OUT JTCK 37 PA14 JTDI 38 PA15 GND 23 VSS_1 GND 35 VUSB VSS_2 U3 GND 47 VSS_3 BAT54C GND 8 VSSA 1 5 VDD_MCU IN OUT D1 C12 C9 STM32L151CBT6 5V_V3 3 EN GND 2 C10 C11 1u 100n STM32L1 VCOM Interface 1u 100n LD39015M33R C C GND GND GND GND GND NRST_MCU VDD_MCU VDD_MCU VDD_MCU VDD_MCU VDD_MCU VDD_MCU OSC_OUT OSC_IN X1 Voltage Regulator C4 C5 C6 C7 C8 100n 100n 100n 100n 100n 47k R3 7A-8.000MAAJ-T C2 C3 18p 18p C13 D D 100n STEVAL-BCN002V1D GND GND GND GND GND GND GND GND 7/23/2018 11:02 AM Crystal and Bypass capacitors Sheet: 1/3 1 2 3 4 5 6

1 2 3 4 5 6 NPPC021KFXC-RC NPPC021KFXC-RC NPPC021KFXC-RC NPPC021KFXC-RC 1296-T10 1296-T10 A SWDIO X4-1 X4-2 VDD A SWDCLK X4-3 X4-4 GND P1 CN3 UART_TX X4-5 X4-6 GND UART_RX X4-7 X4-8 BOOT P2 RESETN GND P1 CN11 X4-9 X4-10 P1 CN1 P1 CN6 BlueTile Debug Connector P2 P2 P2 n.p. n.p. R6 R8 UART_RX UART_TX 1296-T10 1296-T10 VDD_MCU X2-1 X2-2 JTMS GND X2-3 X2-4 JTCK GND GND GND GND X2-5 X2-6 JTDO GND X2-7 X2-8 JTDI GND X2-9 X2-10 B Anchor Connectors B STM32L1 Debug Connector Nucleo STLink UART connector JTAG RESETN P19 P20 GND U4 P17 P18 GND P1 RESETN P15 P16 GND RESETN P1 CN7P5 P2 P13 P14 GND SWDIO P2 CN7P4 P3 P11 P12 GND GND P3 CN7P3 P4 SWDCLK P9 P10 GND SWDCLK C P4 SWDIO P7 P8 GND CN7P2 CN7P1 VDD C NPTC041KFXC-RC P5 P6 GND B3U-3000P(M) SW1 P3 P4 GND Anchor Connector VDD P1 P2 VDD Nucleo STLink SWD Connector 0015912200 JTAG Debug Connector U5 P1 P1 0921-1-15-20-75-14-11-0 GND Pogo pin Reset Button D D STEVAL-BCN002V1D 7/23/2018 11:02 AM Sheet: 2/3 1 2 3 4 5 6

1 2 3 4 5 6 NPPC021KFXC-RC P1 CN5 A ST1 A P2 P1 P32 B_UART_RX T_SW_DIR n.p. R9 P2 P31 RESETN VDD BOOT B_UART_CTS T_NRST P3 P30 B_UART_RTS T_VCC R14 10k R2 SWDIO P4 P29 GND VDD VDD_MCU T_JTMS GND_5 GND P5 P28 GND_DETECT T_JTDI 0 P6 P27 GND T_JTDO GND_4 P7 P26 GND B_SPI_CLK GND_3 GND P8 P25 GND_1 B_SPI_MOSI P9 P24 GND P3 B_CAN_RX GND_2 P3 P10 P23 B_CAN_TX B_SPI_MISO n.p. P11 P22 5V_V3 UART_RX_STM32 B_UART_TX 5V_POWER_SUPPLY UART_TX_V3 P12 P21 UART_RX P2 T_VCP_TX B_GPIO3 R4 P2 SWDCLK P13 P20 UART_RX_V3 T_JTCK B_GPIO2 n.p. P14 P19 GND B_SPI_NSS B_GPIO1 UART_RX_V3 P15 P18 P1 T_VCP_RX B_GPIO0 R1 P1 B B SW2 P16 P17 B_I2C_SCL B_I2C_SDA n.p. VDD R13 ST-LINK/V3 n.p. BOOT P3 R10 P3 UART_TX_STM32 UART_TX P2 P2 UART_TX_V3 P1 P1 SW3 Default configuration allow user to: 1) If PLUGGED on a NUCLEO STLink: - Hardware modification: populate R6 and R8 with 0 ohm C - Programming: using Nucleo STLink mini USB C - Virtual COM: using Nucleo STLink mini USB; both SW3 and SW2 must be in (P1-P2) position 2) If using an EXTERNAL JTAG debugger: - Programming: using JTAG connector on top - Virtual COM: using micro USB connector on the bottom; both SW3 and SW2 must be in (P2-P3) position 3) If using the INTEGRATED USB to UART interface: - Programming: using micro USB connector on the bottom and only using BlueNRG-1 Flasher Utility - Virtual COM: using micro USB connector on the bottom; both SW3 and SW2 must be in (P2-P3) position 4) If using the INTEGRATED ST-LINK/V3: - Hardware modification: populate R4 and R14 with 0 ohm - Programming: using ST-LINK/V3 SWD - Virtual COM: using ST-LINK/V3 micro USB; both SW3 and SW2 must be in (P1-P2) position D D STEVAL-BCN002V1D 7/23/2018 11:02 AM Sheet: 3/3 1 2 3 4 5 6


Document Created: 2019-03-25 18:01:08
Document Modified: 2019-03-25 18:01:08
© 2024 FCC.report
This site is not affiliated with or endorsed by the FCC