Circuit Diagram

FCC ID: OYK-FCC82419

Schematics

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FCCID_3845212

TZ0505S

1 96 I2C-SDA VDAC-VREF I2C-SDA/LCD-IO12/GPIO 2 95 I2C-SCL VDAC-REG I2C-SCL/LCD-IO11/GPIO VDD33 3 94 VDD18 VDD-TV VDD18 GND 4 93 GND GND-TV GND 5 92 RF-TVD/GPIO VDD33 RX SW 6 91 XIN RF-RX-SEL/GPIO XIN TRXD 7 90 XOUT RF-RXD XOUT SPI-CS 8 89 GPIO9 RF-SPI-CS/GPIO GPIO9 SPI-CLK 9 88 GPIO8(CONTROL-1) RF-SPI-CLK GPIO8/I2S-DAT-OUT SPI-RXD 10 87 GPIO7(CONTROL) RF-SPI-IN GPIO7/PWM-B3/I2S-DAT-IN VDD33 11 86 GPIO6(SDA) VDD33 GPIO6/PWM-B2/I2S-BCLK GND 12 85 GPIO5(SCL) GND GPIO5/PWM-B1/I2S-LRCK VDD18 13 84 GPIO4(PWN) VDD18 GPIO4/PWM-B0/I2S-MCLK R10 SPI-TXD 14 83 RST RF-SPI-OUT/GPIO RST 56K BB-CLK 15 82 RF-ANT1/GPIO GND CD-TXEN 16 81 OUTL RF-ANT2/GPIO OUTL RF-PA 17 80 RF-PA/GPIO GND-DAC RF-CE 18 79 VDD33-DAC RF-CE/GPIO VDD-DAC TX SW 19 78 OUTR RF-TX-SEL/GPIO OUTR GPIO0 20 77 VDD33 SNRC50AFG GPIO0/PWM-A0 VDD-LVD GPIO1 21 76 VDDL18 GPIO1/PWM-A1 VDDL18 GPIO2(SD-DET) 22 75 GND GPIO2/PWM-A2 GND-LVD GPIO3(SRESET) 23 74 VDD18-PLL1 GPIO3/PWM-A3 VDD18-PLL1 24 73 VDD33 GND-ADC VDD-PLL MIC-P-L 25 72 VDD18-PLL1 PGA-P-L VDD18-PLL3 MIC-N-L 26 71 GND PGA-N-L GND-PLL3 MIC-P-R 27 70 DP PGA-P-R DP MIC-N-R 28 69 DM PGA-N-R DM VDD33-ADC29 68 GND VDD-ADC GND-USB AIN1-L 30 67 VDD33 AIN1-L VDD-USB AIN1 31 66VDD18-PLL1 AIN1 VDD18-PLL4 AIN2 32 65 AIN2 KEY G 25L8006E

2410.875-2468.25MHz 3 8 13 GND DNC 7 14 VDD3V3 DET VDD 6 15 2402E RXEN GND 5 16 VDD3V3 TXEN VDD 9 32 470p VT RSSI 10 31 1n CPO BP-DS VDD 11 30 100n VDD-PLL BP-LPF 3 1 X1 12 29 SPI-CS X1 SPI-CS XS 13 28 SPI-CLK XS SPI-CLK 14 27 SPI-TXD FP-RDY SPI-TXD 15 26 SPI-RXD BB-CLK SPI-RXD 16 25 VDD MSI VDD D


Document Created: 2017-09-25 17:16:44
Document Modified: 2017-09-25 17:16:44
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