Circuit Description

FCC ID: K66VXA-700

Operational Description

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FCCID_260192

FCC ID: K66VXA-700 Circuit Description VXA-700 Circuit Description Receive Signal Path Narrow FM and AM mode Incoming RF from the antenna jack is passed through a low-pass filter and high-pass filter consisting of coils L1030, L1031, L1035, L1036, L1041 & L1045, capacitors C1142, C1145, C1147, C1153, C1154, C1155, C1159, C1167, C1180, C1182, C1185 & C1186 and antenna switching diodes D1016, D1017 and D1019 (all RLS135) to the receiver front end section. Signals within the frequency range of the transceiver is applied to the receiver front end which contains RF amplifier Q1043 (2SC5555) and varactor-tuned band-pass filter consisting of coils L1022, L1023, L1026, L1027, L1037, L1038, L1043 & L1044, capacitors C1130, C1132, C1134, C1135, C1140, C1143, C1157, C1168, C1175, C1176, C1179 & C1181, and diodes D1014, D1018, D1024 & D1026 (all HVC350), then applied to the 1st mixer Q1040 (2SC5555). Buffered output from the VCO is amplified by Q1017 (2SC5555) to provide a pure 1st local signal between 143.4 and 199.4 MHz for injection to the 1st mixer. The 35.4 MHz 1st mixer product then passes through monolithic crystal filter XF1001 (35M15A1, 7.5 kHz BW) which strips away all but the desired signal, which is then amplified by mixer postamp Q1033 (2SC4215Y). The amplified 1st IF signal is applied to the AM/FM IF subsystem IC Q2034 (TK10931V), which contains the 2nd mixer, 2nd local oscillator, limiter amplifier, noise amplifier and AM/FM detector. A 2nd local signal is generated by PLL reference/2nd local oscillator Q2030 (2SC4116GR) from the 17.475 MHz crystal X2001 The17.475MHz signal is doubled by Q2036 (2SC4400) to produce the 450 kHz 2nd IF when mixed with the 1st IF signal within Q2034. The 2nd IF then passes through the ceramic filter CF2002 (ALFYM450) and CF2003 (CFWM450D) to strip away unwanted mixer products. In the FM mode, a 2nd IF signal from the ceramic filter CF2002 and CF 2003 applied to the limiter amplifier section of Q2034, which removes amplitude variations in the 450 kHz IF before detection of the speech by the ceramic discriminator CD 2001 (CDBM450C24). Detected audio from Q2034 is passed through the de-emphasis, consisting of the resistors 1 Vertex Standard Co., Ltd.

FCC ID: K66VXA-700 Circuit Description R2051, R2053, R2054 & R2101, capacitors C2048, C2049, C2052, C2054 & C2077, and Q2020-2 (NJM2904V), then applied to the AF amplifier Q2010 (TDA7233D). In the AM mode, detected audio from Q2034 is passed through the audio amplifier Q2020-1 (NJM2904V) and ANL circuit, then applied to the AF amplifier Q2020-2 (NJM2904V). When impulse noise received, a portion of the AM detector output signal from the AM/FM IF subsystem Q2034, including pulse noise is rectified by D2012 (BAS316). The resulting DC is applied to the ANL MUTE gate Q1019 (UMG2N), thus reducing the pulse noises. The processed audio signal from Q2020-2 passes through the audio mute gate Q2014 (DTC143ZE) and the volume control to the audio power amplifier Q2010 (TDA7233D), providing up to 0.4 Watts to the headphone jack or 8 Ω loudspeaker. A portion of the AF signal from the AM/FM IF subsystem Q2034 converted into DC voltage within the IC, and then passes through the AGC amplifier Q2026 (UMW1) and Q2027 (2SA1602A) to the inversion amplifiers Q1035 and Q1042 (both 2SC5555). These amplifier reduce the amplifier gain of the IF amplifier Q1033 and the RF amplifier Q1043 while receiving a strong signal. Wide FM mode Incoming RF from the antenna jack is passed through a low-pass filter and high-pass filter consisting of coils L1030, L1031, L1035, L1036, L1041 & L1045, capacitors C1142, C1145, C1147, C1153, C1154, C1155, C1159, C1167, C1180, C1182, C1185 & C1186 and antenna switching diodes D1016, D1017 and D1019 (all RLS135) to the receiver front end section. Signals applied to the wide FM receiver front end which contains RF amplifier Q1041 (2SC5555) and Q1046 (2SC5555), varactor-tuned band-pass filter consisting of coils L1017, L1018, L1024, L1025, L1033, L1034, L1039 & L1040, capacitors C1125, C1128, C1129, C1131, C1136, C1148, C1158, C1161, C1162, C1163, & C1169, and diodes D1013, D1015, D1022 & D1025 (all HVC350), then applied to the 1st mixer Q1039 (2SC5555). Buffered output from the VCO is amplified by Q1017 (2SC5555) to provide a pure 1st local signal between 133.68 and 153.65 MHz for injection to the 1st mixer. The 45.65 MHz 2 Vertex Standard Co., Ltd.

FCC ID: K66VXA-700 Circuit Description 1st mixer product then passes through band-pass filter consisting of coils L1010 & L1011, capacitors C1075, C1078, C1083, C1087, C1092, & C1093. The 1st IF signal is applied to the wide FM IF subsystem IC Q2023 (TA7792F), which contains the 2nd mixer, 2nd local oscillator, limiter amplifier and FM detector. A 2nd local signal is generated by PLL reference/2nd local oscillator Q2030 (2SC4116GR) from the 17.475 MHz crystal X2001. The17.475MHz signal is doubled by Q2036 (2SC4400) to produce the 10.7 MHz 2nd IF when mixed with the 1st IF signal within Q2023. The 2nd IF then passes through the ceramic filter CF2001 (SFECV10.7MS2) to strip away unwanted mixer products. A flitted 2nd IF signal from the ceramic filter CF2001 applied to the limiter amplifier section of Q2023, which removes amplitude variations in the 10.7MHz IF before detection of the speech by the detect coil L2002, capacitors C2061. Detected audio from Q2023 is passed through the de-emphasis, consisting of the resistors R2051, R2053, R2054 & R2074, capacitors C2048, C2049, C2052, C2054 & C2063, and Q2020-2 (NJM2904V), then applied to the AF amplifier Q2010 (TDA7233D). Squelch Control When signal is received, appear the DC squelch control voltage at pin 15 of AM/FM IF subsystem Q2034 according to the receiving signal strength. This DC is applied to pin 13 of microprocessor Q3026. The DC squelch control voltage is compared with the SQL threshold level by the microprocessor Q3026. If the DC squelch control voltage is higher, pin 46 of Q3026 goes high. This signal activate the AF MUTE gate Q2014 (DTC143ZE), thus disabling the AF audio. Also, the microprocessor stops scanning, if active, and allows audio to pass through the AF MUTE gate Q2014. Transmit Signal Path Speech input from the microphone is passed through the microphone amplifier Q3006- 3 (NJM2902V), then applied to the ALC amplifier Q3011 (AN5123MS). 3 Vertex Standard Co., Ltd.

FCC ID: K66VXA-700 Circuit Description In the AM mode, the amplified speech signal is passed through the low-pass filter Q3006-2 (NJM2902V) and high-pass filter Q3012-1 (NJM2904V). A filtered speech signal is passed through Q3013 (M62364FP) which is adjusted the maximum modulation level, to the AM modulator Q1037 (2SK2974). In the FM mode, the amplified speech signal is passed through the low-pass filter Q3006-2 (NJM2902V) and high-pass filter Q3006-4 (NJM2902V), which is pre- emphasized and removed any high frequency components from the speech signal that might result in over-deviation. The processed audio is mixed with a CTCSS tone generated by the microprocessor Q3026, and the level is controlled by Q3013 (M62364FP). The audio is then delivered to D1005 (HSU) for frequency modulation of the PLL carrier up to 5 kHz from the un- modulated carrier at the transmitting frequency. When using the optional headset, the SIDETONE signal from J1005 becomes “HIGH”, turning pin 18 of Q3026 on and pin 56 of Q3026 goes “HIGH,” therefore a portion of the speech signal applied to the AF power amplifier Q2010 as a monitor signal. The carrier signal from the VCO Q1014 (2SC5555) passes through the buffer amplifier Q1017 (2SC5555) and TX/RX switch D1010 (HSU277) The signal from D1021 is amplified by Q1029 (2SC3356), and Q1031 (2SK2973), and ultimately applied to the final amplifier Q1037 (2SK2974) which increases the signal level up to 5 watts output power. The transmit signal then passes through the antenna switch D1017 (RLS135), and is low-pass filtered to suppress away harmonic spurious radiation before delivery to the antenna. Automatic Transmit Power Control RF power output from the final amplifier is sampled by C1149/C1154 and is rectified by D1021 (HMS86WA). The resulting DC is fed through the Automatic Power Controller Q3012 (NJM2904V-2), thus allowing control of the power output. Transmit Inhibit When the transmit PLL is unlocked, pin 7 of PLL chip Q1013 (MB15A01PFV1) goes to 4 Vertex Standard Co., Ltd.

FCC ID: K66VXA-700 Circuit Description a logic low. The resulting DC “unlock” control voltage is switches off TX inhibit switches Q1016 (2SA1602A), Q1018 (UMW1), and Q1020 (DTA143EE) to disable the supply voltage to transmitter RF amplifiers Q1029, disabling the transmitter. Spurious Suppression Generation of spurious products by the transmitter is minimized by the fundamental carrier frequency being equal to the final transmitting frequency. Additional harmonic suppression is provided by a low-pass filter consisting of L1030, L1035 & L1036 and C1147, C1153, C1154, C1155, C1159 & C1167, resulting in more than 60 dB of harmonic suppression prior to delivery of the RF signal to the antenna. PLL Frequency Synthesizer PLL circuitry consists of VCO Q1014 (2SC5555), VCO buffer Q1017 & Q1021 (both 2SC5555), and PLL subsystem IC Q1013 (MB15A01PFV1), which contains a reference divider, serial-to-parallel data latch, programmable divider, phase comparator and charge pump. Stability is maintained by a regulated 3.5 V supply via Q3023 (2SB1132Q) and Q3024 (S-812C35AUA-C2P) which feeds the PLL reference oscillator Q2030 (2SC4116GR), as well as capacitors associated with the 17.475 MHz frequency reference crystal X2001. In the receive mode, VCO Q1014 oscillates between 133.65 and 199.4 MHz. The VCO output is buffered by Q1017 and Q1021, and applied to the prescaler section of Q1013. There the VCO signal is divided by 64 or 65, according to a control signal from the data latch section of Q1013, before being applied to the programmable divider section of Q1013. The data latch section of Q1013 also receives serial dividing data from the microprocessor Q3026 (LC87F72C8A), which causes the pre-divided VCO signal to be further divided in the programmable divider section, depending upon the desired receive frequency, so as to produce a 5 kHz derivative of the current VCO frequency. Meanwhile, the reference divider section of Q1013 divides the 17.475 MHz crystal reference from the reference oscillator Q2030 by 3495 to produce the 5 kHz loop reference. The 5 kHz signal from the programmable divider (derived from the VCO) and that derived from the reference oscillator are applied to the phase detector section of Q1013, which produces a pulsed output with pulse duration depending on the phase difference between the input signals. This pulse train is filtered to DC and returned to the varactor D1007 5 Vertex Standard Co., Ltd.

FCC ID: K66VXA-700 Circuit Description (HVC350). Changes in the level of the DC voltage applied to the varactors affect the reactance in the tank circuit of the VCO, changing the oscillating frequency of the VCO according to the phase difference between the signals derived from the VCO and the crystal reference oscillator. The VCO is thus phase-locked to the crystal reference oscillator. The output of the VCO Q1014 is buffered by Q1017 before application to the 1st mixer, as described previously. For transmission, the VCO Q1014 oscillates between 118 and 137 MHz. The remainder of the PLL circuitry is shared with the receiver. However, the dividing data from the microprocessor is such that the VCO frequency is at the actual transmit frequency (rather than offset for IF’s, as in the receiving case). Receive and transmit buses select which VCO is made active by Q1010 (RT1N241M). FET Q1019 (2SK880GR) buffers the VCV line for application to the tracking band-pass filters in the receiver front end. When the power saving feature is active, the microprocessor periodically signals to the PLL IC Q1013 to conserve power, and to shorten lock-up time. Push-To-Talk Transmit Activation The PTT switch on the microphone is fed through the PTT controller, Q2001 (UMZ2N), to pin 28 of microprocessor Q3026, so that when the PTT switch is closed, pin 25 of Q3026 goes high. This signals cut off the receiver by disabling the 3.5 V supply bus at Q1007 (DTA143EE) which feeds the front-end, FM IF subsystem IC Q2034, and receiver VCO circuitry. At the same time, Q1018 (UMW1) and Q1020 (DTA143EE) activates the transmit 3.5 V supply line to enable the transmitter. 6 Vertex Standard Co., Ltd.


Document Created: 2002-07-04 22:51:14
Document Modified: 2002-07-04 22:51:14
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