CIRCUIT DESCRIPTION

FCC ID: K6630303X3S

Operational Description

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FCCID_846090

                                                                        FCC ID:K6630303X3S
                                                                        IC ID: 511B-30303X3S
                                                                           Circuit Description


                          GX1000S Circuit Description

Reception and transmission are switched the 8-bit MPU IC Q2004 (UPD78F0395) on the
CNTL Unit. The receiver uses double-conversion superheterodyne circuitry, with a 21.4
MHz 1st IF and 450 kHz 2nd IF. The 1st local is produced by a PLL synthesizer, yielding
the 21.4 MHz 1st IF. The 2nd local uses a 21.850 MHz crystal oscillator, yielding the 450
kHz 2nd IF. The 2nd mixer and other circuits use a custom IC to convert and amplify the
2nd IF and detect FM to obtain demodulated signals. During transmit, the PLL synthesizer
oscillates at the desired frequency directly, for amplification to obtain RF power output.
During transmit, voice modulation is applied to this synthesizer. Transceiver functions, such
as TX/RX control, PLL synthesizer settings, and channel programming, are controlled using
the MPU.


RECEIVER
Incoming RF signals from the antenna connector are delivered to the RF Unit, and pass
through a low-pass filter (LPF) consisting of coils L1001 & L1002 and capacitors
C1003,C1011,C1024&C1027, and antenna switching diode D1003・D1004 (L308CCB) for
delivery to the receiver front end.
Signals within the frequency range of the transceiver are then passed through a bandpass
filter consisting of coils L1010 & L1012 and capacitors C1061, C1067, C1074, C1077, &
C1083, before RF amplification by Q1022 (3SK294).
The amplified RF is then passed through a bandpass filter again consisting of coils L1022,
L1026, & L1027 and capacitors C1145, C1150, C1155, C1159, C1169, C1170,
C1174&C1179, the pure in-band input signal is delivered to 1st mixer Q1028 (3SK131).
Buffered output from the VCO is amplified by Q1017 (2SC5006) and low-pass filtered by
coils L1009, L1011, & L1013 and capacitors C1060, C1064, C1071,C1076&C1079, to
provide a pure 1st local signal between 134.65MHz and 141.875 MHz for delivery to the 1st
mixer Q1028 (3SK131).
The 21.4 MHz 1st mixer product then passes through monolithic crystal filters XF1001
(±6.5 kHz BW), and is amplified by Q1036 (2SC4400-3) and delivered to the input of the
FM IF subsystem IC Q1029 (TA31136FN). This IC contains the 2nd mixer, 2nd local
oscillator, limiter amplifier, FM detector, noise amplifier, and squelch gates.
The 2nd local in the FM IF subsystem IC is produced from crystal X1001 (21.850 MHz),
and the 1st IF is converted to 450 kHz by the 2nd mixer and stripped of unwanted
components by ceramic filter CF1001.
After passing through a limiter amplifier, the signal is demodulated by the FM detector.



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                                                                     FCC ID:K6630303X3S
                                                                     IC ID: 511B-30303X3S
                                                                        Circuit Description


Demodulated receive audio from the FM IF subsystem IC is amplified by Q1033 and Q1038
(both 2SC4154E). The audio signal is passed through the AF Mute switch Q1031
(2SK2035) to the AF power amplifier Q1049 (LA4425A), the audio signal is delivered to the
16 Ohm internal loudspeaker and external Speaker terminal in the accessory cable.


PLL SYNTHESIZER
The 1st Local signal maintains stability from the PLL synthesizer by using a 21.850 MHz
reference signal from crystal X1001. PLL synthesizer IC Q1026 (TB31202FNG) consists of
a prescaler, reference counter, swallow counter, programmable counter, a serial data input
port to set these counters based on the external data, a phase comparator, and a charge
pump.
The PLL synthesizer IC divides the 21.850 MHz reference signal by 1748 using the
reference counter (12.5 kHz comparison frequency). The reference oscillator feeds to the
PLL synthesizer IC Q1026 (TB31202FNG). for the 2nd local signal.
The VCO output is divided by the prescaler, swallow counter and programmable counter.
These two signals are compared by the phase comparator, and applied to the charge pump.
A voltage proportional to their phase difference is delivered to the low-pass filter circuit,
then fed back to the VCO as a voltage with phase error, controlling and stabilizing the
oscillating frequency. This synthesizer also operates as a modulator during transmit.
The VCO is consisted of Q1019 (2SK210GR) and varactor diodes D1009, D1011 (all
HVU359), which oscillates at 21.4 MHz below from the receiving frequency. The VCO
output passes through buffer amplifier Q1017,Q1018(2SC5006) to obtain stable output,
then applied to the 1st mixer Q1031 (3SK131). The DC supply for the VCO is regulated by
Q1016 (2SC4154E).


TRANSMITTER
Voice audio from the microphone is delivered via the MIC connector to the MAIN Unit. After
passing through microphone amplifier Q1001 (LM2902PW), a pre-emphasis network,
limiter (IDC: instantaneous deviation control), and low-pass filter network Q1001
(LM2902PW), the audio is adjusted for optimum deviation level and delivered to the next
stage.
Voice or DSC (Digital Selective Calling) encode signal inputs from the low-pass filter
network Q1001 (LM2902PW) is by the VCO Q1019 (2SK210GR) and varactor diode
D1009, D1011 (all HVU359), which oscillates the fundamental transmit frequency with
direct frequency-modulation using varactor diode D1010(1SV214). The modulated signal
passes through buffer amplifier Q1018 and Q1017 (both 2SC5006), diode switch D1006



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                                                                     FCC ID:K6630303X3S
                                                                     IC ID: 511B-30303X3S
                                                                        Circuit Description


(DAN235U) to drive amplifiers Q1008 (2SC5006) and RF power amplifier module Q1014
(S-AV37A).
The RF energy then passes through antenna switch D1003 (L308CCB) and low-pass filter
(LPF) consisting of coils L1001 & L1002 and capacitors C1003, C1011, C1024&C1027 and
finally to the antenna connector.
RF output power from the RF power amplifier module Q1014 (S-AV37A) is sampled by
C1014 and C1021 and is rectified by D1002 (1SS321). The resulting DC is fed through
Automatic Power Controllers Q1002 (LM2904PW) to RF power amplifier module Q1014 (S-
AV37A), thus providing positive control of the power output.
Generation of spurious products by the transmitter is minimized by the fundamental carrier
frequency being equal to the final transmitting frequency, modulated directly in the transmit
VCO. Additional harmonic suppression is provided by a low-pass filter consisting of coils
and capacitors, resulting in more than 70 dB of harmonic suppression prior to delivery of
the RF energy to the antenna.




DSC Encoder/ Decoder
Encoder
The DCS (Digital Selective Calling) encode signal which D/A converted in the 8-bit MPU IC
Q2004 (UPD78F0395) on the CNTL Unit is fed through the low-pass filter Q1001
(LM2902PW) on the MAIN Unit to the VCO Q1019 (2SK210GR).


Decoder
   The receiving DCS code is demodulated by the FM IC Q1029, then fed through the low-
pass filter Q1037 (2SC4154E) to the DCS Decoder IC Q1034 (NJM2211M) which the
receiving DCS code is decoded. The decoded DCS signal delivered to the 8-bit MPU IC
Q2004(UPD78F0395)


1050 Hz Weather Alert Decoder
1050 Hz Weather Alert signal from the FM IF subsystem IC Q1029 (TA31136FN) is
demodulated by Q1033,Q1038 (2SC4154E) then is applied to the 8-bit MPU IC Q2004
(UPD78F0395) on the CNTL Unit.


MPU
Operation is controlled by 8-bit MPU IC Q2004 (UPD78F0395). The system clock uses a
18.4320 MHz crystal for a time base.




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                                                                        FCC ID:K6630303X3S
                                                                        IC ID: 511B-30303X3S
                                                                           Circuit Description



EEPROM
The EE-PROM Q2006 (BR24L08FVT-W) retains TX and RX data for all memory channels,
prescaler dividing, IF frequency, local oscillator injection side, and reference oscillator data.




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Document Created: 2007-08-27 16:53:10
Document Modified: 2007-08-27 16:53:10

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