OPERATIONAL DESCRIPTION

FCC ID: K6630073X20

Operational Description

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FCCID_446252

FCC ID: K6630073X20 IC ID: 511B-30073X20 Circuit Description HX270S Circuit Description 1. Receive Signal Path Incoming RF from the antenna jack is delivered to the RF Unit and passes through a low- pass filter consisting of coils L1025, L1026, and L1027, capacitors C1229, C1235, C1237, C1241, C1243, C1245 and C1246, and antenna switching diode D1033. Signals within the frequency range of the transceiver enter a Varactor-tuned band-pass filter consisting of coils L1019 and L1022, capacitors C1217, C1218 and C1250, and diodes D1030, then amplified by Q1044 and enter a Varactor-tuned band-pass filter consisting of coils L1016, L1017 and L1018, capacitors C1182, C1184, C1185, C1186, C1187, C1188, C1191, C1192, C1195, C1197, and C1199, and diodes D1026, D1027, and D1028, before first mixing by Q1041. Buffered output from the VCO is amplified by Q1023 to provide a pure first local signal between 134.35 and 141.575 MHz for injection to the first mixer Q1041. The 21.7 MHz first mixer product then passes through monolithic crystal filter XF1001/XF1002 to strip away all but the desired signal, which is then amplified by Q1037. The amplified first IF signal is applied to FM IF subsystem IC Q1033, which contains the second mixer, second local oscillator, limited amplifier, noise amplifier, and RSSI amplifier. A second local signal is produced from the PLL reference/second local oscillator of X1001 (21.25 MHz). The 21.25 MHz reference signal is delivered to mixer section of Q1033 which produce the 450 kHz second IF mixed with the first IF signal. The second IF then passes through the ceramic filter CF1001 to strip away unwanted mixer products, and is then applied to the limited amplifier in Q1033, which removes amplitude variations in the 450kHz IF, before detection of the speech by the ceramic discriminator CD1001. 2.Audio Amplifier The demodulated audio signal from the Q1033 passes through a band-pass filter and High-pass filter, then applied to the de-emphasis. Then passes through the audio volume and the audio power amplifier Q1009, providing up to 400 mW of audio power to the 4 Ω loudspeaker. 3. Squelch Control The squelch circuitry consists of a noise amplifier and band-pass filter and noise detector within Q1033. When no carrier received, noise at the output of the detector stage in Q1033 is amplified and band-pass filtered by the noise amplifier section of Q1033 and the network between pins 7 and 8, and then rectified by detection circuit in Q1033. The resulting DC squelch control voltage is passed to pin 73 of the microprocessor Q1043. If no carrier is received, this signal causes pin 67 of Q1043 to go low and pin 66 to go high. Pin 66 signals of Q1043 to disable the supply voltage to the audio amplifier Q1009, while pin 18 hold the green (Busy) half of the LED off. Thus, the microprocessor blocks output from the audio amplifier, and silences the receiver, while no signal is being received (and during transmission, as well). When a carrier appears at the discriminator, noise is removed from the output, causing pin 75 of Q1039 to go low and the microprocessor to activate the ”Busy” LED via Q1053. The microprocessor then checks for CTCSS or CDCSS code squelch information, if enabled. If not transmitting and CTCSS or CDCSS is not activated, or if the received tone or code matches that programmed, allows audio to pass through the audio amplifier Q1009 to the loudspeaker by enabling the supply voltage to it via Q1014. 4. Transmit Signal Path The speech input from the microphone MC1001 passes through the audio amplifier 1/3 Vertex Standard Co., Ltd.

FCC ID: K6630073X20 IC ID: 511B-30073X20 Circuit Description Q1051, which is adjusted the microphone gain. The speech signal passes through pre- emphasis circuit to Q1051, which contains the IDC, and low-pass filter. The filtered audio signal is applied to Q1030 which is adjusted the audio level, then is applied to varactor diode D1007, which frequency modulates the VCO Q1012. A portion of the audio signal from Q1030 is applied to X1001. The processed audio may then be mixed with a CTCSS tone generated by Q1043 for frequency modulation of the PLL carrier (up to ±5 kHz from the unmodulated carrier) at the transmitting frequency. If a CDCSS code is enabled for transmission, the code is generated by microprocessor Q1043 and delivered to X1001 (21.25 MHz) for CDCSS modulating. The modulated signal from the VCO Q1012 is buffered by Q1013. The low-level transmit signal is then passes through the TX switching diode D1010 to the buffer amplifier Q1031, driver amplifier Q1034, then amplified transmit signal is applied to the final amplifier Q1036 up to 5.0 watts output power. The transmit signal then passes through the antenna switch D1031 and is low-pass filtered to suppress harmonic spurious radiation before delivery to the antenna. 4-1 Automatic Transmit Power Control Current from the final amplifier is sampled by C1238, C1239, C1242 and C1244, and R1261, and R1267, and is rectified by Q1032. The resulting DC is fed back through Q1032 to the drive amplifier Q1034 and final amplifier Q1036, for control of the power output. The microprocessor selects ”High” or “Low” power levels. 4-2 Spurious Suppression Generation of spurious products by the transmitter is minimized by the fundamental carrier frequency being equal to final transmitting frequency, modulated directly in the transmit VCO. Additional harmonic suppression is provided by a low-pass filter consisting of coils L1012 and L1013 plus capacitors C1148, C1153, C1154, C1159, C1163 and C1172, resulting in more than 60 dB of harmonic suppression prior to delivery to the antenna. 5. PLL Frequency Synthesizer The PLL circuitry on the Main Unit consists of VCO Q1012, VCO buffer Q1013, PLL subsystem IC Q1015, which contains a reference divider, serial-to-parallel data latch, programmable divider, phase comparator and charge pump, and crystal X1001 which frequency stability is ±5 ppm @ -30 to +60 °C. While receiving, VCO Q1012 oscillates between 134.35 and 141.575 MHz according to the transceiver version and the programmed receiving frequency. The VCO output is buffered by Q1020, then applied to the prescaler section of Q1015. There the VCO signal is divided by 64 or 65, according to a control signal from the data latch section of Q1015, before being sent to the programmable divider section of Q1015. The data latch section of Q1015 also receives serial dividing data from the microprocessor Q1043, which causes the pre-divided VCO signal to be further divided in the programmable divider section, depending upon the desired receive frequency, so as to produce a 5.0 kHz or 6.25 kHz derivative of the current VCO frequency. Meanwhile, the reference divider sections of Q1015 divides the 21.25 MHz crystal reference from the reference oscillator section of Q1015, by 3360 (or 2688) to produce the 5.0 kHz (or 6.25 kHz) loops reference (respectively). The 5.0 kHz (or 6.25 kHz) signal from the programmable divider (derived from the VCO) and that derived from the reference oscillator are applied to the phase detector section of Q1043, which produces a pulsed output with pulse duration depending on the phase difference between the input signals. 2/3 Vertex Standard Co., Ltd.

FCC ID: K6630073X20 IC ID: 511B-30073X20 Circuit Description This pulse train is filtered to DC and returned to the Varactor D1004. Changes in the level of the DC voltage applied to the Varactor, affecting the reference in the tank circuit of the VCO according to the phase difference between the signals derived from the VCO and the crystal reference oscillator. The VCO is thus phase-locked to the crystal reference oscillator. The output of the VCO Q1012 after buffering by Q1013 is applied to the first mixer as described previously. For transmission, the VCO Q1012 oscillates between 156.025 and 157.425 MHz according to the model version and programmed transmit frequency. The remainder of the PLL circuitry is shared with the receiver. However, the dividing data from the microprocessor is such that the VCO frequency is at the actual transmit frequency (rather than offset for IFs, as in the receiving case). Also, the VCO is modulated by the speech audio applied to D1006, as described previously. 6. Miscellaneous Circuits Push-To-Talk Transmit Activation The PTT switch on the internal microphone is connected to Q1007, so that when the PTT switch is closed, pin 19 of Q1043 goes high. This signal disables the receiver by disabling the 5 V supply bus at Q1027 to the front-end, FM IF subsystem IC Q1033. At the same time, Q1024 and Q1025 activate the transmit 5 V supply line to enable the transmitter. 3/3 Vertex Standard Co., Ltd.


Document Created: 2004-05-25 15:24:01
Document Modified: 2004-05-25 15:24:01
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