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FCC ID: JLFTX4

Test Report

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FCCID_63238

[ SENNHEISE 3E Technical Data RF—Section: Frequency generation PLL Synthesizer RF ranges A 518 ... 550 MHz 630 ... 662 MHz & O w 740 ... 772 MHz 790 ... 822 MHz E 838 ... 870 MHz Switching bandwidth 32 MHz Operating frequencies max. 8 out of 1280, in 25 kHz steps Frequency stability <+ 15 ppm (—10°C to +55°C) Antenna output BNC jack, 50 Q REF—output power into 50 0 > 20 mW internally adjustable typ. 10 mW Spurious and harmonic radiation <4 nW (per ETS 300 422) Modulation FM stereo MPX Nom. deviation at 1 kHz + 24 kHz Peak deviation + 48 kHz Pilot tone deviation (stereo operation) * 5 kHz AF—Section: Noise reduction system proprietary dual HDX® compressor AF input 2 x 1/4" balanced stereo jacks AF input level for peak dev. at 1 kHz +10 dBu (3.16 Vrms) AF input impedance > 10 k Q AF frequency range 50 Hz ... 15 kHz (— 3 dB) Signal to noise ratio > 100 dBA THD at 1 kHz and nom. deviation <0.9%, typ. 0.5 % Headphone monitor output 1/4" stereo jack AF—monitor output power > 100 mW at 32 , adjustable FCC ID: DMOF1EURHKH 3

V sSENMNM:EiSERAR System Control Microprocessor CPU 8—bit, 4 MHz (MB89191A—TX) Nonvolatile memory EEPROM Programming interface / software 3 push buttons / menu driven Display multifunction LCD plus bargraphs Indicated parameters AF1 level, 8—step bargraph AF2 level, 8—step bargraph 6—digit alphanumeric for sensitivity frequency, channel number, name stereo / mono operation mute General Power supply external, 10.5 to 16 Vde Power consumption approx. 200 mA Operating temperature range ~10°C ... +55°C (—14°F ... 131°F) Dimensions W x D x H 212 x 145 x 38 mm (8 378 x 6 x 1 1/2") Weight: approx. 1100 g (2 Ibs 7 oz) Recommended receiver: EK 300 IEM Recommended accessory: AC 1, Active Antenna Combiner In Compliance with: ETS 300 422, ETS 300 445 (CE) FCC Part 74 FCC ID: DMOF1EURH 4

)sENNXNIHMEISER 3. General Description The SR 300 IEM is a stereo transmitter of a wireless low power auxiliary station for the transmission of audio cue or control command signals with up to 8 preprogrammed UHF frequencies in a 32 MHz range. RF characteristics are the same as for a standard wireless microphone, making implementation of multi—channel systems easy. Their high level of operational reliability, ease of use and excellent mechanical stability make these transmitters the ideal choice for use in large live shows. Features: «_ up to 8 switchable operating frequencies per transmitter, PLL controlled + switching bandwidth max. 32 MHz «_ monaural or multiplexed stereo modulation + HDx® noise reduction system with > 100 dB(A) S/N + adjustable input sensitivity + adjustable RF—output power + LCD indicator for operating frequency, channel number, name, deviation, mode, mute + compact 4& 19"—rack 1U housing + suitable for multi—channel operation FCC ID: DMOF1EURH 5

) SENNHEISEE 4. Technical Description 4.1 Construction Details The fixed transmitter SR 300 IEM is consists of four printed circuit boards, housed in a sturdy metal case and powered by a separate wall—plug—in power supply. The main board contains all control electronics, plus the audio circuits, which consist of dual electronically gain controlled preamplifiers with rumble filters, dynamic compressor (HDx) stages, which include effective modulation limiters, mute control, stereo MPX coder, peak deviation indicators, and power supply and conditioners. Attached to the main board is the RF module, which incorporates the PLL and VCO, together with the RF buffer, driver and output stages, and the EEPROM with specific frequency data. Also attached to the main board is the display module with the operational keys. Furthermore, there is a headphone monitor module connected to the main board. The resulting assembly is housed in a sturdy metal housing, providing superb mechanical protection and electronic shielding. The front panel of the transmitter features its operating controls and a back !it multifunction LC—display. The controls are a power switch, an audio monitor output with volume control, and three control keys. These control keys are labeled ‘A‘ (UP), ‘v‘ (DOWN) and ‘SET‘. Located at the rear panel are the input socket for an external power supply, the audio input jacks for right and left channels, and the RF—output BNC socket. Permanently attached to the back of the housing is the type label, which includes the FCC identifier and other approval and certification markings. 4.2 Circuit Description 4.2.1 Mother Board with Audio— and Processor—Circuits The audio signals are processed in two identical circuit sections for both channels. in each channel the balanced AF—signal is routed from the 1/4" tip—ring sleeve jack (J101 (J201) to a differential buffer amplifier U1O1—1 (U201—1), which is followed by an active high—pass filter amplifier U101—2 (U201—2) with electronic gain control in its feedback path via Q101/0102 (Q210/Q201) and Q103/Q104 (Q203/0204). The preamplifier is coupled to the HDx® compressor circuit fortned by U103—2/U102—1 (U203—2/U202—1) and its associated components via the R/C link of R125 and C112 (R225 and C212) for pre—emphasis. The compressor incorporates a limiter for both signal polarities of potentially excessive input signals with Q105 and Q106 (Q205 and Q206). The processed signal is output through buffer amplifiers U103—4 and U103—3 (U203—4 and U203—3). A very steep active 15 kHz low—passfilter section with U104 and U105 (U204 and U205) couples the AF—signal to the output buffer U102—2 (U202—2). FCC iD: DMOF1EURH 6

N sc~NNHEIsSER® The right and left signals are routed under electronic control to the stereo MPX coder section. in addition, from the output buffer the signal is picked off to derive a control signal for the bargraph level display. The 3.8 MHz clock signal from the processor section is digitally divided in U3 and U6 to generate the 38 kHz sub carrier and 19 kHz pilot tone. The 38 kHz signal alternately switches in US the left and right AF—signals from their input buffers U4—1 and U4—2 to the summing amplifier U20—1, where the multiplexed signal is combined with the 19 kHz pilot tone, which has been conditioned in the active 57 kHz filter section with U8 and U7. The combined MPX signal is further conditioned in an active MPX—tow pass filter with U9 and U1O before it is routed via the buffer U11 to the modulation input of the RF—module. The micro controller U12 controls all transmitter functions. Afterinitializing, the controller recognizes the device‘s frequency range. The voltage sensitive Schmitt—Trigger IC U13 tests the battery voltage and forces the controller to abort the start—up procedure if the operating voltage falls below its threshold. After successfully booting up. the controlier then reads in the data for the last used frequency from the EEPROM on the RF—module and programs the PLL. In the standard mode of operation, the controller periodically scans the operating keys. Any key activity forces the processor to branch to the corresponding subroutine and send appropriate menu options to the LC—display module, consisting of the LCD U802 and its own controller IC U801. The processor‘s internal software offers access to commands for scanning and setting the operating frequency, assigning channel or other alphanumeric {name) designations, setting the AF—processor gain. Frequency and channel data are interpreted in the processor IC and send to the LC—display via its controller. The processor also monitors the PLL IC and any abnormal or ‘out—of—lock‘ condition will force the RF—output to be disabled. The LC—display also displays through two 8—step bargraphs the audio signal levels of right and teft channels. The control signals are derived from the processed audio signals in the AF—meter rectifier section with active full—way rectifiers U16 and their output buffers U17. The main board incorporates the power supply regulators and power conditioning for all other circuits. The power input jack J1 is protected against reverse polarity with fuse F1 and D1. A regulator IC U14 supplies most circuit sections with well regulated 10 V. For the digital control circuits this supply is further regulated to the 5 V requirement by the monolithic regulator IC U15, and for certain other section in regulator IC U18. Various discrete transistors provide control, delay and power routing functions under processor control. 4.2.2 RF—Module When the transmitter is turned on, the processor module activates all stages with the exception of the RF—output stages. Next it loads via a serial bus the frequency specific data from the EEPROM U3 into the PLL IC U1. This IC sets its internal dividers and compares the 5 kHz reference frequency derived from the 4 MHz crystal Y901 on the main board with the transmission frequency divided in the fast prescaler U2. A phase FCC iD: DMOF1EURH T

detector in U1 produces current pulses proportional to the difference in phase. After integration in the loopfilters, the resulting signal controls the VCO at D2. Effective RF decoupling is achieved with additional passive components. The circuit around Q2 and variable capacitance diodes D1 and D2 forms the voltage controlled oscillator with very low current consumption and generating the carrier frequency with very low phase noise at a VCO gain of > 20 MHz/V. The current regulator loop with Q1 further reduces VCO phase noise below 10 MHz by up to 15 dB. The VCO is AF—modulated by D1. Through this arrangement the variation in FM sensitivity is held to +/— 0.5 dB within the tuning range. Trimmcap C6 permits to center the tuning voltage correctly. The VCO output is loosely coupled into a broadband cascade buffer amplifier Q4. To eliminate any possible interference, the entire VCO and buffer section is housed in a tightly shielded compartment. The subsequent stages with transistors Q5, Q6 and Q9 amplify the transmission signal from —10 dBm via +1 dBm to +17 dBm. Broadband matching between the stages is achieved by the LC high pass filters of L7/C31 and L9/C33. Transistors Q7 and Q8 control and stabilize the RF—output. Under control from the main processor the RF—output stage can be turned off, and it experiences a delayed power—up command to allow the PLLVCO to achieve reliable lock before emitting a any transmission. A low—pass filter/matching network follows Q9 and eliminates any potential emission of harmonics, while performing the impedance match between the collector impedance of the output stage and the effective antenna impedance. Also loosely coupled to the VCO output is the prescaler U3. This IC divides the VCO frequency by 64 or 65 respective of the modulus control output of the PLL IC U1. A two channel/stereo headphone monitor is incorporated into the transmitter. It gets its inputs from the audio preamplifier, before pre—emphasis and dynamic processing. The dual volume control R1 precedes the monitor preamplifier U1. The special audio amplifier IC U2 provides the power boost to 100 mWi/channel into a 32 Q load at the stereo 1/4" monitor output jack. The entire monitor module with volume control and output jack is contained on a separate small circuit board. An optional accessory, the active antenna combiner AC 1, is available for connection of the output of up to four transmitters to a common transmitting antenna. Active buffer amplifiers precede the passive combiner and provide excellent isolation between the connected transmitters. Their gain is just enough to compensate for the combiner losses. In this way the creation of intermodulation products in the transmitter output stages is effectively avoided. FCC ID: DMOF1EURH 8


Document Created: 2001-05-21 23:56:13
Document Modified: 2001-05-21 23:56:13
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