4

FCC ID: GQ43VT25R

Block Diagram

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FCCID_46361

                                                                                                1 TAXVV
Automaotive Electronics Group
                                                 Re: Certification for TRW ‘01 RS Receiver
                                                     Model No.: GQ43VT25R
                                                     FCC ID: GQA43VT2SR
                                                     CANADA:


PRINCIPLES OF CIRCUIT OPERATION
The receiver portion of the remote lock control system is incorporated into the wiring system of an
automobile and is powered by the vehicle‘s 12V battery.

The receiver is super—hetordyne in design and is tuned to 315MHz. It has an onboard PCB trace antenna.
The incoming RF signalis filtered, amplified and mixed down to the intermediate frequency, amplified
again, demodulated and then the data is fed into the microprocessor. The microprocessor reads the
received data and decides if it enters operation mode or programming mode. If a valid operation code is
received, it will activate the appropriate outputs to the BCM after verifying them with the 32 bits of
encrypted data stored in EEPROM.




                                              ~VIHt —


                                                                                                      I   TAXVV
Automotive Electronics Group
                                                    Re: Certification for TRW ‘01 RS Receiver
                                                        Model No.: GQ43VT25R
                                                        FCC ID: GQ43VT2SR
                                                        CANADA:


BLOCK DIAGRAM

The receiver circuit is comprised of a PCB antenna, RF amplifier, mixer, local oscillator, data filter,
EEPROM and microprocessor.




                                                       LOCAL
                                                     OSCILLATOR



    ANTENNA
                                                             F



              RF AMPLIFIER                                MIXER                »/_     DATA FILTER




                                                                                            F



                                                          EEPROM                        MICROPROCESSOR


                                                                                     L___




                                                                                       OUTPUT DRIVE




                                      Figure 1. Receiver Block Diagram




                                                 — IX —



Document Created: 2001-06-07 18:04:13
Document Modified: 2001-06-07 18:04:13

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