Processing Gain Additional Info

FCC ID: FDI-09101727-0

Test Report

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FCCID_188160

                                                                            Nederland B.V.__________________________________

                                                                                                         Zadelstede 1-10
                                                                                                         3431 JZ Nieuwegein
                                                                                                         The Netherlands
                                                                                                         Phone: +31 30 6097666
                                                                                                         Fax: +31 30 6097556
FCC...


                                                                                   Nieuwegein, 30 May 2001

Re:    Processing Gain WaveLAN/Orinoco PC Cards
       Add. Info to Processing Gain report:
For Chip/symbol rate etc. see the table below:
     Bit rate           Chip/symbol rate       Bit/symbol rate                                      Chip/bit rate
      1 Mbit/sec                    11         1, DBPSK                                                      11
      2 Mbit/sec                    11         2, DQPSK                                                      5.5
     5.5 Mbit/sec                    8         4, CCK                                                         2
     11 Mbit/sec                     8         8, CCK                                                         1

Extra Information:
1.    For 1 and 2 Mbp/s DQPSK modulation using a fixed spreading sequence the symbol rate is 1
      MSymbol/s. The symbol length is 11 chips. Each chip duration is 1/11 uS. A symbol duration is 1 uS.

      The chip/symbol rate is 11.           The theoretical process gain is 10*LOG(11) = 10 dB.

2.    For 5.5 and 11 Mbp/s CCK where the spreading sequence is a function of the transmitted data, the
      symbol rate is 8/11 MSymbol/s. The symbol length is 8 chips. Each chip duration is 1/11 uS. A symbol
      duration is 8/11 uS.

      The chip/symbol rate is 8.
      The theoretical process gain is 10*LOG(8) = 9 dB. Due to the fact that only 256 code sequences out of
      the 65536 code sequences that are available are used, there is coding gain. Therefore the processing
      gain of a CCK system consists of spreading gain and coding gain together. As such a CCK system
      does meet the FCC requirement for a process gain of minimal 10 dB.

         Explanation:
         The Lucent High Speed modulation is compliant to draft standard extension IEEE 802.11b for 5.5 and 11 MBit/s signaling
         rates. For this modulation technique the Symbol length is 8 Chips (1 Symbol duration equals 8/11 uS). However, the 8 Chips
         are not a fixed spreading sequence as is the case for the 1 and 2 MBit/s modulation technique. These 8 Chips, applied in a
         QPSK modulation, use 256 unique patterns out of the 65536 different possible patterns, whereby each pattern represents a
         specific data sequence (4 or 8 bits). Thus this type of modulation introduces Coding Gain, since only 256 patterns are used
         out of 65536 possible combinations.

         Therefore it can be concluded that the system employs Coding Gain in addition to Spreading Gain.

         The Processing Gain of the system is taken as the combined result of Coding and Spreading Gain, so a Processing Gain of
         10 dB can be met with 8 Chips per Symbol.

         Lucent has shown by a CW jammer margin test that a SIR of 10 dB can be met, while meeting the system specified BER. It
         is our understanding that this is compliant with the FCC ruling.

         Therefore the test report shows that the Lucent product, operating at 1, 2, 5.5 and 11 Mbit/s meets a Processing Gain of at
         least 10 dB, under the conditions as specified by the FCC.


Sincerely yours,

Bert Vos, Certifications Support,



Document Created: 2019-10-08 20:12:50
Document Modified: 2019-10-08 20:12:50

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