15_FSC-BT646 UserMan r2

FCC ID: 2AMWOFSC-BT646

Users Manual

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FSC‐BT646 Datasheet S BLE 4.2 Single Mode Bluetooth Module Datasheet Version 2.1 Shenzhen Feasycom Technology Co.,Ltd ‐1‐ www.feasycom.com

FSC‐BT646 Datasheet Copyright © 2013‐2018 Feasycom Technology. All Rights Reserved. Feasycom Technology reserves the right to make corrections, modifications, and other changes to its products, documentation and services at anytime. Customers should obtain the newest relevant information before placing orders. To minimize customer product risks, customers should provide adequate design and operating safeguards. Without written permission from Feasycom Technology, reproduction, transfer, distribution or storage of part or all of the contents in this document in any form is prohibited. Revision History Version Data Notes 2.0 2018/12/04 Initial Version Fish 2.1 2018/12/18 Upgrade to BLE 4.2 Fish Contact Us Shenzhen Feasycom Technology Co.,LTD Email: sales@feasycom.com Address: Room 2004‐2005,20th Floor,Huichao Technology Building,Jinhai Road, Xixiang ,Baoan District,Shenzhen,518100,China. Tel: 86‐755‐27924639 Tel: 86‐755‐23062695 （Overseas） Shenzhen Feasycom Technology Co.,Ltd ‐2‐ www.feasycom.com

FSC‐BT646 Datasheet Contents 1. INTRODUCTION ........................................................................................................................................................... 4 2. GENERAL SPECIFICATION ............................................................................................................................................. 5 3. HARDWARE SPECIFICATION ...................................................................................................................................... 6 3.1 BLOCK DIAGRAM AND PIN DIAGRAM ......................................................................................................................................... 6 3.2 PIN DEFINITION DESCRIPTIONS ................................................................................................................................................. 7 4. PHYSICAL INTERFACE ................................................................................................................................................... 8 4.1 POWER SUPPLY....................................................................................................................................................................... 8 4.2 RESET ................................................................................................................................................................................... 8 4.3 GENERAL PURPOSE ANALOG IO ................................................................................................................................................. 9 4.4 GENERAL PURPOSE DIGITAL IO .................................................................................................................................................. 9 4.5 RF INTERFACE ........................................................................................................................................................................ 9 4.6 SERIAL INTERFACES ................................................................................................................................................................10 4.6.1 UART.........................................................................................................................................................................10 4.6.2 I2C Interface ..............................................................................................................................................................11 4.7 PWM INTERFACE .................................................................................................................................................................11 5. ELECTRICAL CHARACTERISTICS ................................................................................................................................... 11 5.1 ABSOLUTE MAXIMUM RATINGS ...............................................................................................................................................11 5.2 DC ELECTRICAL CHARACTERISTICS ............................................................................................................................................12 5.3 AC ELECTRICAL CHARACTERISTICS ............................................................................................................................................12 6. MSL & ESD ................................................................................................................................................................ 13 7. RECOMMENDED TEMPERATURE REFLOW PROFILE ..................................................................................................... 13 8. MECHANICAL DETAILS ............................................................................................................................................... 15 8.1 MECHANICAL DETAILS ............................................................................................................................................................15 8.2 HOST PCB LAND PATTERN AND ANTENNA KEEP‐OUT FOR FSC‐BT646 ...........................................................................................16 9. HARDWARE INTEGRATION SUGGESTIONS .................................................................................................................. 16 9.1 SOLDERING RECOMMENDATIONS .............................................................................................................................................16 9.2 LAYOUT GUIDELINES(INTERNAL ANTENNA).................................................................................................................................17 9.3 LAYOUT GUIDELINES(EXTERNAL ANTENNA) ................................................................................................................................17 9.3.1 Antenna Connection and Grounding Plane Design ..................................................................................................18 10. PRODUCT PACKAGING INFORMATION...................................................................................................................... 19 10.1 DEFAULT PACKING ...............................................................................................................................................................19 10.2 PACKING BOX(OPTIONAL) ...................................................................................................................................................20 11. APPLICATION SCHEMATIC ........................................................................................................................................ 21 Shenzhen Feasycom Technology Co.,Ltd ‐3‐ www.feasycom.com

FSC‐BT646 Datasheet 1. INTRODUCTION Overview Application FSC‐BT646 is Bluetooth Low Energy 4.2(BLE4.2) Module. Health Thermometer It can be used as an application processor as well as a Heart Rate data pump in fully hosted systems. MCU is 32‐bit Blood Pressure microcontroller. It supports a wide range of applications Proximity from low‐end, price sensitive designs to computing‐ Human Interface Device (HID) intensive ones and provides advanced high‐end features in economical products. Very low active RF, MCU current and low‐power mode Module picture as below showing current consumption provide excellent battery lifetime and allow for operation on small coin cell batteries and in energy‐harvesting applications. The BLE4.2 firmware includes the L2CAP service layer protocols, Security Manager (SM), At‐tribute Protocol (ATT), the Generic Attribute Profile (GATT) and the Generic Access Profile (GAP). Features Figure 1: FSC‐BT646 Picture 2.4‐GHz RF Transceiver Compatible With Bluetooth low energy (BLE) 4.2 Programmable TX power up to 13dBm(Class 1) RX sensitivity up to ‐90dBm Postage stamp sized form factor Programmable baud‐rate generator(baudrate can up to 921600bps) UART, I2C,SPI,12‐bit ADC,PWM connection interfaces Bluetooth stack profiles support: HID Operating Voltage:2.0V to 3.6V Operating Temperature: ‐40°C to +85°C Shenzhen Feasycom Technology Co.,Ltd ‐4‐ www.feasycom.com

FSC‐BT646 Datasheet 2. General Specification Table 1: General Specifications Categories Features Implementation Bluetooth Version Bluetooth low energy 4.2 Frequency 2.402 ‐ 2.480 GHz Wireless Transmit Power +13 dBm (Maximum) Specification Receive Sensitivity ‐90 dBm (Typical) Modulation GFSK TX, RX, CTS, RTS General Purpose I/O UART Interface Default 115200,N,8,1 Baudrate support from 1200 to 921600 5, 6, 7, 8 data bit character 22(maximum – configurable) lines GPIO Pull‐up resistor (33 KΩ) control Host Interface and Read pin‐level Peripherals I2C Interface 2(configurable from GPIO total). Up to 400 kbps Analog input voltage range: 0.4V ~ 1.4V(or 2.4V) based on configure Supports single 12‐bit SAR ADC conversion ADC Interface 8 channels (configured from GPIO total) Up to 200MSPS conversion 8 PWM outputs PWM Supports edge‐alignment or center‐alignment Supports fault detection Class Bluetooth No Support Profiles Bluetooth Low Energy GATT Client & Peripheral ‐ Any Custom Services Maximum Classic Bluetooth No Support Connections FW upgrade J‐Link Supply Voltage Supply 2.0V ~ 3.6V Power Consumption Deep Sleep ‐ 2uA(Wake up by wakeup PAD or RESET) Physical Dimensions 13mm X 26.9mm X 2.0mm; Pad Pitch 1.5mm Operating ‐40°C to +85°C Environmental Storage ‐40°C to +125°C Lead Free Lead‐free and RoHS compliant Miscellaneous Warranty One Year Humidity 10% ~ 90% non‐condensing MSL grade: MSL 3 Human Body Model All pins: ±4000V ESD grade: Charged device model RF pins/ Non‐RF pins: ±750V Shenzhen Feasycom Technology Co.,Ltd ‐5‐ www.feasycom.com

FSC‐BT646 Datasheet 3. HARDWARE SPECIFICATION 3.1 Block Diagram and PIN Diagram Antenna UART (optional) Internal(Default) or external antenna J‐Link I2C (optional) 16MHZ PIOs/AIOs Crystal Wake Bluetooth Chip 32.768KHz (optional) VDD Reset 2.0V ~ 3.6V Figure 2: Block Diagram EXT_ANT 36 GND 35 1 UART_TX P5.2/EXT_WAKEUP 34 2 UART_RX P0.7 33 3 UART_CTS/P1.4 P0.2 32 4 UART_RTS/P1.5 P0.3 31 5 NC P2.0/I2C1_SDA 30 6 NC P2.3/I2C1_CLK 29 7 NC P2.2/SPI1_CLK 28 8 NC P0.4 27 9 ADC6/P3.0 P3.6/SPI1_SS 26 10 ADC7/P3.1 P2.2/SPI1_CLK 25 11 RESET P5.7/SPI1_MISO 24 12 VDD P1.0/SPI1_MOSI 23 ICE_DAT 22 ICE_CLK 13 GND GND GND P2.4 P2.5 P2.6 NC NC 14 15 16 17 18 19 20 21 Figure 3: FSC‐BT646 PIN Diagram(Top View) Shenzhen Feasycom Technology Co.,Ltd ‐6‐ www.feasycom.com

FSC‐BT646 Datasheet 3.2 PIN Definition Descriptions Table 2: Pin definition Pin Pin Name Type Pin Descriptions Notes 1 UART_TX O UART data output Note 1 2 UART_RX I UART data input Note 1 3 UART_CTS/P1.4 I UART clear to send active low Note 1 Alternative Function: Programmable input/output line 4 UART_RTS/P1.5 I/O UART request to send active low Note 1 Alternative Function: Programmable input/output line 5 NC NC 6 NC NC 7 NC NC 8 NC NC 9 ADC6/P3.0 I/O Programmable input/output line Note 1 Alternative Function: Analogue programmable I/O line 10 ADC7/P3.1 I/O Programmable input/output line Note 1 Alternative Function: Analogue programmable I/O line 11 RESET I External reset input: Active LOW, with an inter an internal pull‐up Set this pin low reset to initial state 12 VDD Vdd Power supply voltage 2.0V ~ 3.6V 13 GND Vss Power Ground 14 NC NC 15 NC NC 16 ICE_CLK I/O Debugging through the CLK line(Default) Note 1 17 ICE_DAT I/O Debugging through the DATA line(Default) Note 1 18 P2.4 I/O Programmable input/output line 19 P2.5 I/O Programmable input/output line 20 P2.6 I/O Programmable input/output line 21 GND Vss Power Ground 22 GND Vss Power Ground 23 P1.0/SPI1_MOSI I/O Programmable input/output line Note 6 * The I/O port for reuse. 24 P5.7/SPI1_MISO I/O Programmable input/output line Note 6 * The I/O port for reuse. 25 P2.2/SPI1_CLK I/O Programmable input/output line Note 6 * The I/O port for reuse. 26 P3.6/SPI1_SS I/O Programmable input/output line Note 6 * The I/O port for reuse. 27 P0.4 I/O Programmable input/output line 28 P2.2/SPI1_CLK I Programmable input/output line Note 6 * The I/O port for reuse. 29 P2.3/I2C1_CLK I/O Programmable input/output line Note Alternative Function: I2C CLK line (Default) 1,3 Shenzhen Feasycom Technology Co.,Ltd ‐7‐ www.feasycom.com

FSC‐BT646 Datasheet 30 P2.0/I2C1_SDA I/O Programmable input/output line Note Alternative Function: I2C DATA line (Default) 1,3 31 P0.3 I/O Programmable input/output line Note 1 Alternative Function 1: Analogue programmable I/O line. Alternative Function 2: Host MCU disconnect bluetooth 32 P0.2 I/O Programmable input/output line Note Alternative Function: LED(Default) 1,4 33 P0.7 I/O Programmable input/output line Note Alternative Function: BT Status(Default) 1,2 34 P5.2/EXT_WAKEUP I/O Programmable input/output line 35 GND Vss RF Ground 36 EXT_ANT O RF signal output Note 5 Module Pin Notes: Note 1 For customized module, this pin can be work as I/O Interface. Note 2 BT Status (Default)‐‐ Disconnected: Low Level; Connected: High Level. Note 3 I2C Serial Clock and Data. It is essential to remember that pull‐up resistors on both SCL and SDA lines are not provided in the module and MUST be provided external to the module. Note 4 LED(Default)‐‐ Power On: Light Slow Shinning ; Connected: Steady Lighting. Note 5 By default, this PIN is an empty feet. This PIN can connect to an external antenna to improve the Bluetooth signal coverage. If you need to use an external antenna, by modifying the module on the 0R resistance to block out the on‐board antenna; Or contact Feasycom for modification. Note 6 This I / O port is shared with the internal SPI Flash chip. We do not recommend using this pin, floating processing. This pin is only available when the module is not equipped with air‐upgrade function. 4. PHYSICAL INTERFACE 4.1 Power Supply The transient response of the regulator is important. If the power rails of the module are supplied from an external voltage source, the transient response of any regulator used should be 20μs or less. It is essential that the power rail recovers quickly. 4.2 Reset The module may be reset from several sources: Power‐on Reset (POR), Low level on the nRESET Pin (nRST), Watchdog time‐out reset (WDT), Low voltage reset (LVR). The RESET pin is an active low reset and is internally filtered using the internal low frequency clock oscillator. A reset will be performed between 1.5 and 4.0ms following RESET being active. It is recommended that RESET be applied for a period greater than 5ms. Shenzhen Feasycom Technology Co.,Ltd ‐8‐ www.feasycom.com

FSC‐BT646 Datasheet 4.3 General Purpose Analog IO 12‐bit resolution and 10‐bit accuracy Analog input voltage range: 0.4~1.4 or 0.4~2.4V based on configure Up to eight single‐end analog input channels Two operating modes  Single mode: A/D conversion is performed one time on a specified channel  PWM sequence mode: When PWM trigger, two of three ADC channels from 0 to 2 will automatically convert analog data in the sequence of channel [0,1] or channel[1,2] or channel[0,2] defined by MODESEL (ADC_SEQCTL[3:2]) An A/D conversion can be started by  Software write 1 to SWTRG bit  External pin STADC  PWM trigger with optional start delay period Each Conversion result is held in data register with valid and overrun indicators Conversion results can be compared with specified value and user can select whether to generate an interrupt when conversion result matches the compare register setting Channel 8 supports 2 input sources: External analog voltage and internal fixed band‐gap voltage 4.4 General Purpose Digital IO There are 22 general purpose digital IOs defined in the module. All these GPIOs can be configured by software to realize various functions, such as button controls, LED drives or interrupt signals to host controller, etc. Do not connect them if not use. The I/O type of each I/O pins can be configured by software individually as Input or Push‐pull output mode. After the chip is reset, the I/O mode of all pins is input mode with no pull‐up and pull‐down enable. Each I/O pin has an individual pull‐up and pull‐down resistor which is about 30 kΩ ~ 50 kΩ for VDD and Vss. 4.5 RF Interface For This Module, the default mode for antenna is internal ,it also has the interface for external antenna. If you need to use an external antenna, by modifying the module on the 0R resistance to block out the on‐board antenna; Or contact Feasycom for modification. The user can connect a 50 ohm antenna directly to the RF port. 2402–2480 MHz BLE4.2 TX output power of +13dBm. RX sensitivity up to ‐90dBm Shenzhen Feasycom Technology Co.,Ltd ‐9‐ www.feasycom.com

FSC‐BT646 Datasheet 4.6 Serial Interfaces 4.6.1 UART FSC‐BT646 provides one channels of Universal Asynchronous Receiver/Transmitters (UART)(Full‐duplex asynchronous communications). The UART Controller performs a serial‐to‐parallel conversion on data received from the peripheral and a parallel‐to‐serial conversion on data transmitted from the CPU. This is a standard UART interface for communicating with other serial devices. The UART interface provides a simple mechanism for communicating with other serial devices using the RS232 protocol. When the module is connected to another digital device, UART_RX and UART_TX transfer data between the two devices. The remaining two signals, UART_CTS and UART_RTS, can be used to implement RS232 hardware flow control where both are active low indicators. This module output is at 3.3V CMOS logic levels (tracks VCC). Level conversion must be added to interface with an RS‐ 232 level compliant interface. Some serial implementations link CTS and RTS to remove the need for handshaking. We do not recommend linking CTS and RTS except for testing and prototyping. If these pins are linked and the host sends data when the FSC‐BT646 deasserts its RTS signal, there is significant risk that internal receive buffers will overflow, which could lead to an internal processor crash. This drops the connection and may require a power cycle to reset the module. We recommend that you adhere to the correct CTS/RTS handshaking protocol for proper operation. Table 3: Possible UART Settings Parameter Possible Values Minimum 1200 baud (≤2%Error) Baudrate Standard 115200bps(≤1%Error) Maximum 921600bps(≤1%Error) Flow control RTS/CTS, or None Parity None, Odd or Even Number of stop bits 1 /1.5/2 Bits per channel 5/6/7/8 When connecting the module to a host, please make sure to follow . Figure 4: UART Connection Shenzhen Feasycom Technology Co.,Ltd ‐10‐ www.feasycom.com

FSC‐BT646 Datasheet 4.6.2 I2C Interface Two I2C master and slaver devices with DMA Bidirectional data transfer between masters and slaves Multi‐master bus Arbitration between simultaneously transmitting masters without cor‐ruption of serial data on the bus Serial clock synchronization allowing devices with different bit rates to communicate via one serial bus Serial clock synchronization can be used as a handshake mechanism to suspend and re‐sume serial transfer Built‐in 14‐bit time‐out counter that requests the I2C interrupt if the I2C bus hangs up and timer‐out counter overflows Programmable clocks allow for versatile rate control Supports multiple address recognition 4.7 PWM Interface Up to four built‐in 16‐bit PWM generators, providing eight PWM outputs or four com‐plementary paired PWM outputs Individual clock source, clock divider, 8‐bit pre‐scalar and dead‐time generator for each PWM generator PWM interrupt synchronized to PWM period Supports edge‐alignment or center‐alignment Supports fault detection 5. ELECTRICAL CHARACTERISTICS 5.1 Absolute Maximum Ratings Absolute maximum ratings for supply voltage and voltages on digital and analogue pins of the module are listed below. Exceeding these values causes permanent damage. The average PIO pin output current is defined as the average current value flowing through any one of the corresponding pins for a 100mS period. The total average PIO pin output current is defined as the average current value flowing through all of the corresponding pins for a 100mS period. The maximum output current is defined as the value of the peak current flowing through any one of the corresponding pins. Table 4: Absolute Maximum Rating Symbol Description Min Trp Max Unit VDD BT Input voltage ‐0.3 ‐ 3.6 V VI Input voltage ‐0.3 ‐ VDD V VO Output voltage VSS ‐ VDD V TOP Operating Temperature ‐40 ‐ 85 °C TSTG Storage Temperature ‐40 ‐ 125 °C Note: Exceeding one or more of the limiting values may cause permanent damage to FSC‐BT646. Caution: Electrostatic sensitive device, comply with protection rules when operating. Shenzhen Feasycom Technology Co.,Ltd ‐11‐ www.feasycom.com

FSC‐BT646 Datasheet 5.2 DC Electrical Characteristics Table 5: Voltage and current Symbol Parameter Min Type Max Unit Test Conditions VDD‐VSS ‐ DC Power Supply 2.0 3 3.6 V TA=25°C TA ‐ Operating Temperature ‐40 25 +85 °C ‐ I1 Standby Current in Sleep mode ‐ 1.5 ‐ uA Wakeup PAD or RESET VOH Output high level voltage VDD‐0.3 ‐ VDD V ‐ VOL Output low level voltage VSS ‐ VSS+0.3 V ‐ VIH Input high level voltage 2.0 3 3.6 V ‐ VIL Input low level voltage VSS ‐ VSS+0.3 V ‐ 5.3 AC Electrical Characteristics Table 6: RF Symbol Parameter Min Type Max Unit General frequency Fop Operating frequency 2402 ‐ 2480 MHz PLLres PLL Programming resolution ‐ 1 ‐ MHz Fxtal Crystal frequency ‐ 16 ‐ MHz DR Data rate ‐ 1 ‐ Mbps △f1M Frequency deviation 225 250 275 KHz FCH1M Channel spacing ‐ 2 ‐ MHz Transmitter PRF Output power ‐18 ‐ 13 dBm PBW 20dB Bandwidth for Modulated Carrier at 1Mbps ‐ 1.5 ‐ MHz Receiver RXmax Maximum received signal at <0.1% BER ‐ ‐10 ‐ dBm RXSENS Sensitivity (0.1%BER) @1Mbps ‐ ‐90 ‐ dBm C/ICO C/I Co-channel interference ‐ 11 ‐ dB C/I1MHz Adjacent 1MHz interference ‐ ‐2 ‐ dB C/I2MHz Adjacent 2MHz interference ‐ ‐22 ‐ dB C/I3MHz Adjacent ≥3MHz interference ‐ ‐38 ‐ dB C/Iimage Image frequency interference ‐ ‐12 ‐ dB C/ Iimage±1MHz Ajacent 1MHz interference to in‐band image freq ‐ ‐24 ‐ dB Table 7: ADC Symbol Parameter Min Type Max Unit Resolution ‐ ‐ 12 ‐ Bit Enob ‐ ‐ 10 ‐ Bit IOT Operation Current 880 1000 1660 uA Shenzhen Feasycom Technology Co.,Ltd ‐12‐ www.feasycom.com

FSC‐BT646 Datasheet Pclk System Clock ‐ ‐ 52 MHz FS Sample Rate ‐ ‐ 0.5 MHz Fin ‐ 0 ‐ 40 KHz Vrefp‐Vrefn Analog input voltage, Reference voltage Vbg 1 2 2 V Cin Input Capacitane ‐ 10 ‐ pF VCM ‐ 0.9 ‐ 1.4 V DATA ADC Output 000 ‐ FFF HEX SFDR Spurious Free Dynamic range ‐ 72 ‐ dB 6. MSL & ESD Table 8: MSL and ESD Parameter Test Conditions Value MSL grade: MSL 3(1) Human body model (HBM), per ANSI/ESDA/JEDEC JS001(2) All pins ±4000V ESD grade: RF pins ±750V Charged device model (CDM), per JESD22‐C101(3) Non‐RF pins ±750V (1)The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (2) JEDEC document JEP155 states that 500‐V HBM allows safe manufacturing with a standard ESD control process. (3) JEDEC document JEP157 states that 250‐V CDM allows safe manufacturing with a standard ESD control process. 7. RECOMMENDED TEMPERATURE REFLOW PROFILE Prior to any reflow, it is important to ensure the modules were packaged to prevent moisture absorption. New packages contain desiccate (to absorb moisture) and a humidity indicator card to display the level maintained during storage and shipment. If directed to bake units on the card, please check the Picture below and follow instructions specified by IPC/JEDEC J‐STD‐033. Note: The shipping tray cannot be heated above 65°C. If baking is required at the higher temperatures displayed in the Picture below, the modules must be removed from the shipping tray. Any modules not manufactured before exceeding their floor life should be re‐packaged with fresh desiccate and a new humidity indicator card. Floor life for MSL (Moisture Sensitivity Level) 3 devices is 168 hours in ambient environment 30°C/60%RH. Table 9: Recommended baking times and temperatures 125°C Baking Temp. 90°C/≤ 5%RH Baking Temp. 40°C/ ≤ 5%RH Baking Temp. Saturated @ Floor Life Limit Saturated @ Floor Life Limit Saturated @ Floor Life Limit MSL 30°C/85% + 72 hours @ 30°C/85% + 72 hours @ 30°C/85% + 72 hours @ 30°C/60% 30°C/60% 30°C/60% Shenzhen Feasycom Technology Co.,Ltd ‐13‐ www.feasycom.com

FSC‐BT646 Datasheet 3 9 hours 7 hours 33 hours 23 hours 13 days 9 days Feasycom surface mount modules are designed to be easily manufactured, including reflow soldering to a PCB. Ultimately it is the responsibility of the customer to choose the appropriate solder paste and to ensure oven temperatures during reflow meet the requirements of the solder paste. Feasycom surface mount modules conform to J‐STD‐020D1 standards for reflow temperatures. The soldering profile depends on various parameters necessitating a set up for each application. The data here is given only for guidance on solder reflow. Figure 5: Typical Lead‐free Re‐flow Pre‐heat zone (A) — This zone raises the temperature at a controlled rate, typically 0.5 – 2 C/s. The purpose of this zone is to preheat the PCB board and components to 120 ~ 150 C. This stage is required to distribute the heat uniformly to the PCB board and completely remove solvent to reduce the heat shock to components. Equilibrium Zone 1 (B) — In this stage the flux becomes soft and uniformly encapsulates solder particles and spread over PCB board, preventing them from being re‐oxidized. Also with elevation of temperature and liquefaction of flux, each activator and rosin get activated and start eliminating oxide film formed on the surface of each solder particle and PCB board. The temperature is recommended to be 150 to 210 for 60 to 120 second for this zone. Equilibrium Zone 2 (C) (optional) — In order to resolve the upright component issue, it is recommended to keep the temperature in 210 – 217  for about 20 to 30 second. Reflow Zone (D) — The profile in the figure is designed for Sn/Ag3.0/Cu0.5. It can be a reference for other lead‐free solder. The peak temperature should be high enough to achieve good wetting but not so high as to cause component discoloration or damage. Excessive soldering time can lead to intermetallic growth which can result in a brittle joint. The recommended peak temperature (Tp) is 230 ~ 250 C. The soldering time should be 30 to 90 second when the temperature is above 217 C. Cooling Zone (E) — The cooling ate should be fast, to keep the solder grains small which will give a longer‐lasting joint. Typical cooling rate should be 4 C. Shenzhen Feasycom Technology Co.,Ltd ‐14‐ www.feasycom.com

FSC‐BT646 Datasheet 8. MECHANICAL DETAILS 8.1 Mechanical Details  Dimension: 13mm(W) x 26.9mm(L) x 2.0 mm(H) Tolerance: ±0.1mm  Module size: 13mm X 26.9mm Tolerance: ±0.2mm  Pad size: 1mmX0.8mm Tolerance: ±0.1mm  Pad pitch: 1.5mm Tolerance: ±0.1mm 2.0mm Figure 6: FSC‐BT646 footprint Shenzhen Feasycom Technology Co.,Ltd ‐15‐ www.feasycom.com

FSC‐BT646 Datasheet 8.2 Host PCB Land Pattern and Antenna Keep‐out for FSC‐BT646 Please check the picture below for Pad Structure and Keep Out Area: Figure 7: Host PCB‐Top View 9. HARDWARE INTEGRATION SUGGESTIONS 9.1 Soldering Recommendations FSC‐BT646 is compatible with industrial standard reflow profile for Pb‐free solders. The reflow profile used is dependent on the thermal mass of the entire populated PCB, heat transfer efficiency of the oven and particular type of solder paste used. Consult the datasheet of particular solder paste for profile configurations. Feasycom will give following recommendations for soldering the module to ensure reliable solder joint and operation of the module after soldering. Since the profile used is process and layout dependent, the optimum profile should be studied case by case. Thus following recommendation should be taken as a starting point guide. Shenzhen Feasycom Technology Co.,Ltd ‐16‐ www.feasycom.com

FSC‐BT646 Datasheet 9.2 Layout Guidelines(Internal Antenna) It is strongly recommended to use good layout practices to ensure proper operation of the module. Placing copper or any metal near antenna deteriorates its operation by having effect on the matching properties. Metal shield around the antenna will prevent the radiation and thus metal case should not be used with the module. Use grounding vias separated max 3 mm apart at the edge of grounding areas to prevent RF penetrating inside the PCB and causing an unintentional resonator. Use GND vias all around the PCB edges. The mother board should have no bare conductors or vias in this restricted area, because it is not covered by stop mask print. Also no copper (planes, traces or vias) are allowed in this area, because of mismatching the on‐board antenna. Figure 8: FSC‐BT646 Restricted Area Following recommendations helps to avoid EMC problems arising in the design. Note that each design is unique and the following list do not consider all basic design rules such as avoiding capacitive coupling between signal lines. Following list is aimed to avoid EMC problems caused by RF part of the module. Use good consideration to avoid problems arising from digital signals in the design. Ensure that signal lines have return paths as short as possible. For example if a signal goes to an inner layer through a via, always use ground vias around it. Locate them tightly and symmetrically around the signal vias. Routing of any sensitive signals should be done in the inner layers of the PCB. Sensitive traces should have a ground area above and under the line. If this is not possible, make sure that the return path is short by other means (for example using a ground line next to the signal line). 9.3 Layout Guidelines(External Antenna) Placement and PCB layout are critical to optimize the performances of a module without on‐board antenna designs. The trace from the antenna port of the module to an external antenna should be 50 and must be as short as possible to avoid any interference into the transceiver of the module. The location of the external antenna and RF‐IN port of the module should be kept away from any noise sources and digital traces. A matching network might be needed in between the external antenna and RF‐IN port to better match the impedance to minimize the return loss. Shenzhen Feasycom Technology Co.,Ltd ‐17‐ www.feasycom.com

FSC‐BT646 Datasheet As indicated in picture below, RF critical circuits of the module should be clearly separated from any digital circuits on the system board. All RF circuits in the module are close to the antenna port. The module, then, should be placed in this way that module digital part towards your digital section of the system PCB. Non enmitting Non enmitting circuits circuits RF_IN Digital Part Digital & Analog Circuits PCB Figure 9: Placement the Module on a System Board 9.3.1 Antenna Connection and Grounding Plane Design Figure 10: Leave 5mm Clearance Space from the Antenna General design recommendations are: The length of the trace or connection line should be kept as short as possible. Distance between connection and ground area on the top layer should at least be as large as the dielectric thickness. Routing the RF close to digital sections of the system board should be avoided. To reduce signal reflections, sharp angles in the routing of the micro strip line should be avoided. Chamfers or fillets are preferred for rectangular routing; 45‐degree routing is preferred over Manhattan style 90‐degree routing. Shenzhen Feasycom Technology Co.,Ltd ‐18‐ www.feasycom.com

FSC‐BT646 Datasheet Figure 11: Recommended Trace Connects Antenna and the Module Routing of the RF‐connection underneath the module should be avoided. The distance of the micro strip line to the ground plane on the bottom side of the receiver is very small and has huge tolerances. Therefore, the impedance of this part of the trace cannot be controlled. Use as many vias as possible to connect the ground planes. 10. PRODUCT PACKAGING INFORMATION 10.1 Default Packing a, Tray vacuum b, Tray Dimension: 180mm * 195mm Shenzhen Feasycom Technology Co.,Ltd ‐19‐ www.feasycom.com

FSC‐BT646 Datasheet Figure 12: Tray vacuum 10.2 Packing box(Optional) * If require any other packing, must be confirmed with customer * Package: 1000PCS Per Carton (Min Carton Package) Figure 13: Packing Box Shenzhen Feasycom Technology Co.,Ltd ‐20‐ www.feasycom.com

FSC‐BT646 Datasheet 11. Certifications FCC ID: 2AMWOFSC‐BT646 (OEM) Integrator has to assure compliance of the entire end‐product incl. the integrated RF Module. For 15 B (§15.107 and if applicable §15.107) compliance, the host manufacturer is required to show compliance with 15 while the module is installed and operating. Furthermore the module should be transmitting and the evaluation should confirm that the module's intentional emissions (15C) are compliant (fundamental / out‐of‐band). Finally the integrator has to apply the appropriate equipment authorization (e.g. Verification) for the new host device per definition in §15.101. Integrator is reminded to assure that these installation instructions will not be made available to the end user of the final host device. The final host device, into which this R‐F Module is integrated" has to be labelled with an auxiliary lable stating the FCC ID of the RF Module, such as "Contains FCC ID: 2AMWOFSC‐BT646 "This device complies with part 15 of the FCC rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation." NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: ‐‐Reorient or relocate the receiving antenna. ‐‐Increase the separation between the equipment and receiver. ‐‐Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. ‐‐Consult the dealer or an experienced radio/TV technician for help. Changes or modifications to this unit not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. Shenzhen Feasycom Technology Co.,Ltd ‐21‐ www.feasycom.com

Module statement The single-modular transmitter is a self-contained, physically delineated, component for which compliance can be demonstrated independent of the host operating conditions, and which complies with all eight requirements of § 15.212(a)(1) as summarized below. 1) The radio elements have the radio frequency circuitry shielded. 2) The module has buffered modulation/data inputs to ensure that the device will comply with Part 15 requirements with any type of input signal. 3) The module contains power supply regulation on the module. 4) The module contains a permanently attached antenna. 5) The module demonstrates compliance in a stand-alone configuration. 6) The module is labeled with its permanently affixed FCC ID label 7) The module complies with all specific rules applicable to the transmitter, including all the conditions provided in the integration instructions by the grantee. 8) The module complies with RF exposure requirements. This transmitter/module must not be collocated or operating in conjunction with any other antenna or transmitter.

Integration instructions for host product manufacturers according to KDB 996369 D03 OEM Manual v01 2.2 - List of applicable FCC rules FCC Part 15.247 2.3 - Summarize the specific operational use conditions This transmitter/module and its antenna(s) must not be co-located or operating in conjunction with any other antenna or transmitter. This information also extends to the host manufacturer’s instruction manual. 2.4 - Limited module procedures not applicable 2.5 - Trace antenna designs It is “not applicable” as trace antenna which is not used on the module. 2.6 - RF exposure considerations This equipment complies with FCC RF radiation exposure limits set forth for an uncontrolled environment. This compliance to FCC radiation exposure limits for an uncontrolled environment, and minimum of 50cm separation between antenna and body. The host product manufacturer would provide the above information to end users in their end-product manuals. 2.7 - Antennas The module equipped with PCB Antenna（2dBi, 2.402 GHz to 2.480GHz）. 2.8 - Label and compliance information The end product must carry a physical label or shall use e-labeling followed KDB784748D01 and KDB 784748 stating “Contains Transmitter Module FCC ID: 2AMWOFSC-BT646”. 2.10 - Additional testing, Part 15 Subpart B disclaimer The modular transmitter is only FCC authorized for the specific rule parts (FCC Part15.247) listed on the grant, and that the host product manufacturer is responsible for compliance to any other FCC rules that apply to the host not covered by the modular transmitter grant of certification. The final host product still requires Part 15 Subpart B compliance testing with the modular transmitter installed when contains digital circuity.

2.9 Information on test modes and additional testing requirements Information on test modes: The host manufacturer can use software for access to the test modes. Connected to the device through the serial port of the host product and control the module. If it does not work, then the host product manufacturer should coordinate with the module manufacturer for access to test mode software. The following provides guidance to host product when installing this module on how they may verify the end product: A. If the modular transmitter has been fully tested by the module grantee on the required number of channels, modulation types, and modes, it should not be necessary for the host installer to re‐test all the available transmitter modes or settings. It is recommended that the host product manufacturer, installing the modular transmitter, perform some investigative measurements to confirm that the resulting composite system does not exceed the spurious emissions limits or band edge limits (e.g., where a different antenna may be causing additional emissions). B. The testing should check for emissions that may occur due to the intermixing of emissions with the other transmitters, digital circuitry, or due to physical properties of the host product (enclosure). This investigation is especially important when integrating multiple modular transmitters where the certification is based on testing each of them in a stand‐alone configuration. It is important to note that host product manufacturers should not assume that because the modular transmitter is certified that they do not have any responsibility for final product compliance. C. If the investigation indicates a compliance concern the host product manufacturer is obligated to mitigate the issue. Host products using a modular transmitter are subject to all the applicable individual technical rules as well as to the general conditions of operation in Sections 15.5, 15.15, and 15.29 to not cause interference. The operator of the host product will be obligated to stop operating the device until the interference has been corrected. Shenzhen Feasycom Technology Co.,Ltd ‐22‐ www.feasycom.com


Document Created: 2019-08-30 15:07:18
Document Modified: 2019-08-30 15:07:18
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