United States Patent: 3649767

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United States Patent	3,649,767
Muroga , et al.	March 14, 1972

AUTOMATIC TELEPHONE SYSTEM ACTIVATED BY STORED PROGRAMS AND INCLUDING CIRCUITS TO INDICATE BUSY-IDLE STATES OF SYSTEM COMPONENTS

Abstract

In a system of the space division, stored program type for telephone use, state circuits are connected with subscriber's line circuits, trunk circuits, links and command execution wired logics. Each state circuit supplies to the wired logics a signal representative of the instant operational state of the connected line circuit, trunk and link and receives therefrom a signal representing that the wired logics have processed the state signal. A rotating magnetic memory is used as the central memory device. Also, a pair of central controllers may be provided to operate in the reversed operational modes of call processing and link setting at the same time.

Inventors:	Muroga; Ko (Tokyo *-to, JA), Okuda; Jiro* (Tokyo *-to, JA), Shimasaki; Nobushiko* (Tokyo *-to, JA), Terashima; Toshio* (Tokyo *-to, JA), Maruyama; Yasushi* (Tokyo *-to, JA), Kaneyasu; Hiroshi* (Tokyo *-to, JA), Sohma; Kikuya* (Tokyo *-to, JA), Lovell; Clarence A.* (McLean, VA)
Assignee:	Nippon Electric Company, Limited (Tokyo *-to*, JA)
Appl. No.:	04/842,095
Filed:	July 16, 1969

Current U.S. Class: 379/279 ; 379/280; 379/32.04

Current International Class: H04Q 3/545 (20060101); H04q 003/54 ()

Field of Search: 179/18ES,18E,18FF

References Cited [Referenced By]

U.S. Patent Documents


3487173	December 1969	Duthie et al.

Primary Examiner: Claffy; Kathleen H.
Assistant Examiner: Brown; Thomas W.

Claims

What is claimed is:

1. An electronic controlled space division switching system of the stored program type having a plurality of peripheral elements and a common control equipment, each said element producing a status signal representing the busy and the idle states, said equipment producing a reservation signal for reserving, for subsequent use, a desired one of said elements, wherein the improvement comprises state circuits, substantially equal in number to said elements, associated with said elements, respectively, and with said equipment for reception of said status and said reservation signals, each said circuit storing the busy and the idle states of the associated one of said elements in compliance with the logic sum of said status and said reservation signals to supply said equipment with a state signal representing the busy and the idle states of said associated element.

2. A switching system according to claim 1 wherein the peripheral elements include lines, links and trunks, each associated with at least one state circuit, and the state circuit signal used for the reserved state is the same as that used for the busy state.

3. A switching system according to claim 1, wherein the improvement further comprises a rotating magnetic memory device in said equipment for accessing successively to the relevant ones of said circuits and said elements as a result of rotation to make said equipment supply signals to said desired element and receive signals therefrom.

4. A switching system according to claim 1, said elements including selectable information paths, said equipment processing the data for selecting the desired path and establishing said desired path in compliance with the processed data, wherein the improvement further comprises two central controllers in said equipment, each associated with said state circuits, and each operable cyclically in the data processing mode and in the path establishing mode, and both operating simultaneously, one in the data processing mode of a call and the other in the path establishing mode of another call.

5. A switching system according to claim 1, one of said elements serving as an active element in processing of a call, another of said elements serving as a passive element in processing of said call, said elements including selectable information paths, said equipment processing the data for selecting one of said paths that interconnects said active and said passive elements and establishes said one path in compliance with the processed data, wherein the improvement comprises a central controller in said equipment, said controller reserving a desired one of said elements as said passive elements, said controller including an idle test circuit for checking the actual state of said active and said reserved passive elements before establishing said information path.

6. A switching system according to claim 4, wherein one of said controllers is operable cyclically in said data processing and said path establishing modes while the other of said controllers is operable cyclically in said path establishing and said data processing modes, respectively, during the time said two controllers operate cyclically in said processing and path establishing modes and are subject to trouble, and one of said controllers operates cyclically in said data processing and said path establishing modes during the time the other of said controllers is activated out of said data processing and said path establishing modes in response to a trouble signal to provide an indication thereof.

7. A switching system according to claim 1 and adapted for telephone switching, said elements including a plurality of numerical signals processing trunks, each of said numerical signals consisting of a plurality digits, each represented by a corresponding series of pulses, an interdigit pause provided between two consecutive series of pulses representing two consecutive digits; said series of pulses representing said numerical signal and serving to identify a called party, wherein said state circuits include pulse processing trunk state circuits associated with said processing trunks, respectively, each of said processing trunks state circuits comprising means for dealing pulse series-by-pulse series with said series of pulses and for producing flag signals in said pauses, respectively, each said flag signal representing completion of processing of one of said series of pulses that precedes each said pause.

8. A switching system according to claim 1, said system containing a memory for storing programs including a plurality of microcommands and a plurality of macrocommands, each said macrocommand covering several individual commands of the class of said microcommands to be executed in succession causing said equipment to control the operation of desired ones of said elements in a manner specified thereby, wherein the improvement further comprises signal producing means and an aggregate of wired logics in said equipment, said means producing macrocommand signals one at a time in compliance with said programs stored in said memory, said macrocommand signals representing said respective macrocommands, said aggregate associated with said means, said circuits, and said elements for executing said macrocommands in response to said macrocommand signals.

9. A switching system according to claim 1, said system adapted to telephone switching, said elements including a plurality of links, each having input and output terminal pairs, each said pair adapted for connection with one each of preselected line and trunk terminals of said system, respectively, wherein the improvement further comprises a memory track, a register, and wired logic in said equipment, said track associated with said logic and having a plurality of memory areas which are assigned to said links, respectively, and which store for nondestructive readout by said logic data relating to said link input and output terminal pairs, respectively, said register serving as a temporary store for information relating to said link input and output terminal pairs for said preselected line and trunk terminal connection, said logic associated with said circuits and said register for finding an idle path via that one of said circuits which is associated with said idle path, in consideration of said data received from said track memory areas and said information received from said register.

10. A switching system according to claim 1, said equipment comprising at least one central controller, wherein the improvement further comprises a memory device in said equipment, said device associated with said controller and storing for nondestructive readout by said controller the substantially permanent data related to said elements, respectively, said controller receiving the data derived from said device as a result of said nondestructive readout to utilize such data for accessing to successive relevant ones of said circuits and to make said relevant circuits in turn supply said state signals.

11. An electronic controlled space division telephone switching system of a stored program type having peripheral equipment and common control equipment; said peripheral equipment comprising a plurality of unit equipments including a multiplicity of subscriber line circuits and a plurality of trunks, and a main link including a plurality of links; said common control equipment comprising a first storage device storing substantially permanent programs of call processing routines and a central controller; said controller reading out from said device the programs providing the call processing routines specifying the operation of said controller, respective data related to said unit equipments and said links, and translation data for determining which of said routines is to be followed by said controller; said controller carrying out a call processing operation in a call processing mode of identifying a pair of said unit equipments with reference to a call being served by the system and specifying one of said routines to be followed for such call; said controller causing said main link to carry out a link setting operation in a link setting mode of interconnecting said identified unit equipment pair in accordance with said specified one routine; wherein the improvement comprises a multiplicity of state circuits interposed between said peripheral and common control equipments and associated with said unit equipments and said links, respectively, and with said controller for temporarily storing for readout by said controller those states of service of the respective associated ones of said unit equipments and said links in which such respective ones are left at a given time; a second storage device of quicker access for temporarily storing data relative to the progress of said specified one routine excluding said states of service; said first and second devices having means associated with said circuits for successive access thereto; another central controller which is a duplicate of said first central controller; each of said controllers comprising first means associated with said circuits and said devices for receiving state signals from successively accessed ones of said circuits as a result of said data readout from said respective storage devices to carry out said specified call processing operation; each of said controllers further comprising second means associated with said first means and said main link for supplying control signals to said main link to activate said main link to carry out said link setting operation; each of said controllers cyclically operable in said call processing and link setting modes in reverse to said call processing and link setting modes of the other of said controllers.

Description

This invention relates to an electronic controlled space division switching system of the stored program type and, more particularly, to such system designed for a common control automatic telephone, data, or telegraph transmission to embody a space division cross-point switching matrix electronically controlled by stored programs.

As is well known in the art, a common control automatic telephone switching system comprises peripheral equipment and common control equipment. The peripheral equipment consists of peripheral elements including the subscriber's line circuits, the trunk circuits or trunks, and the links. The common control equipment detects call originations, receives and processes numerical signals such as, for example, dial pulses and multifrequency signals, establishes the desired connection, rings the called subscriber, supervises the call, makes records for use in charging such calls that are not free, and otherwise carries out the switching control functions.

In a No. 1 ESS electronic switching system described in the Bell System Technical Journal, Volume XLIII, No. 5, Sept. 1964, stored program is used to accomplish the switching control functions. The common control equipment of the No. 1 ESS system comprises a central processor, a program store, a call store, scanners, and signal distributors, instead of the more familiar electromagnetic relay-type components of the electromechanical control used heretofore in switching systems. In the No. 1 ESS system all of the above-mentioned switching functions are converted into data processing functions that are processed under the control of the stored programs. Such an electronic controlled switching system has a high potential for use due to its great flexibility which permits the switching control functions to be changed or supplemented with new ones in an expeditious manner.

It should be pointed out, however, that the proportion of the "fixed hardware" needed for an office to the "proportional hardware" which is needed in proportion to the number of the local subscribers and the traffic they generate is very large in the No. 1 ESS switching system. The peripheral equipment, being substantially proportional in bulk to the number of the subscribers and the traffic, imposes no strong constraints on the whole size of the office. The data processing equipments, however, change only slightly with the scale of the office, being more dependent on the number and the types of services offered than on the number of the subscribers to whom the services are offered. Thus, the No. 1 ESS switching system is economically at a great disadvantage when it is considered for use in moderate and small sized offices.

Furthermore, the No. 1 ESS system stores the instantaneous states of operation of the peripheral elements in the main memory store so that the switching control commands are based on this stored information rather than the actual states of the peripheral elements at the moment. There is an incidence of error, although small, in the stored information which causes malfunctions in the call processing function thereby degrading the service. This degradation of service is restored in the No. 1 ESS system by use of large audit and maintenance programs at the expense of a further increased amount of fixed hardware.

A general object of this invention is to provide an improved electronic controlled space division switching system of the stored program type wherein many of those features are retained which have been perfected through long use of prior art automatic switching systems.

Another general object is to provide a switching system having interoffice signaling and supervision equipments enabling expeditious use with other switching systems presently in use.

Still another general object is to provide a switching system which operates satisfactorily with telephone sets and data terminal equipments presently in common use, including coin telephone devices.

Yet another general object is to provide a switching system which is particularly adapted for use in a medium or a small type of central office.

An object of this invention is to provide a switching system wherein the quantity of hardware required is determined and varies in proportion to the number of local subscribers and the traffic generated thereby.

Another object is to provide a switching system equipped with state circuits for indicating the busy and idle states of the peripheral elements and for reserving one or more thereof for use in a particular connection.

Still another object is to provide a switching system wherein the program is both short and easily written so as to reduce the cost of the software as well as the quantity of the fixed hardware.

Yet another object is to provide a switching system wherein highly repetitive trains of operations are performed by an aggregate of wired logics to raise the switching speed and to reduce the required amount of the fixed hardware.

A further object is to provide a switching system which applies no constraints on the junctor pattern of the switching network and nevertheless has extremely simple logic for expeditiously selecting an idle path therethrough.

A still further object is to provide a switching system having means for checking the network status independently before and after execution of the switching control commands to prevent misconnections, which would otherwise occur from errors in data processing by the operating one of the central controllers and to cause another central controller to make a second attempt to establish a connection in a case where the first attempt failed.

According to this invention, there is provided an electronic controlled space division switching system of the stored program type having a peripheral equipment and a common control equipment for controlling the operation of the peripheral equipment, wherein the improvement comprises a plurality of circuits (termed state circuits) in the common control equipment, substantially equal in number to the subscribers directly served by the peripheral equipment, for performing a portion of the function of the common control equipment.

According to a first aspect, the present invention involves the use of a rotating magnetic memory, such as a magnetic drum or disc, for giving successive accesses to the relevant ones of the state circuits as a result of the rotation to activate the common control equipment to supply signals to the desired element and to receive signals therefrom.

According to a second aspect, the invention concerns the use of two central controllers, each connected to the state circuits and operable cyclically in the data processing mode for processing a call while the other is in the path establishing mode for establishing a switching path for a previously processed call, and vice versa.

According to a third aspect, the invention is related to the use of signal producing devices and a group of discrete wired logics wherein the devices produce macrocommand signals one at a time in compliance with stored programs, each macrocommand signal representing one macrocommand and the wired logics group are connected to the signal producing devices and the state circuits for executing the respective macrocommands in response to the corresponding macrocommand signal received from the signal devices.

By virtue of the invention, a number of simple but highly repetitive operations which have not been changed since the introduction of the common control switching system, are carried out by the state circuits which may be manufactured by integrated circuit techniques or other wise at a cost lower than that for the manufacture of devices for doing such operations by using data processing techniques. An example of such repetitive operations is that of counting the individual pulses in a dial pulse train and detecting the interdigit pause that defines the end of the pulse train. The number of the required state circuits diminishes with a decrease in the number of the subscribers and a descreased amount of traffic. Inasmuch as the operation of dial pulse counting will not change in the future, no usable flexibility is lost in taking that operation from the program control and placing it in the wired logics for accomplishment. Furthermore, this control change greatly simplifies the stored programs and permits a reduction in the quantity of the required fixed hardware.

The state circuits are coupled with the subscriber's line circuits, the links, and the trunks and with the common control equipment to notify the control equipment regarding the busy, the idle, the reserved and other states of the service of the peripheral elements at a given time. Moreover, the control equipment reserves such elements during the call processing mode. Inasmuch as the state circuit indication only is used in searching for an idle element, a reserved one is made to look busy on test until it becomes actually busy. In one embodiment, the state circuit has one bit of memory, such as a flip-flop or a similar bistable circuit, the state of which is set and reset by logical combinations of signals received from the associated peripheral elements and from the control equipment. The memory bit is automatically reset when the peripheral element becomes idle.

In addition to the state circuits, independent means are provided for effecting a double check on the state of each peripheral element to reduce the chances of making misconnections or invading busy speech connections. When a peripheral element is found busy by the independent means whereas the state circuit reported it as idle, a trouble record is made showing the element for which the discrepancy exists.

Also, it should be mentioned that only two talking path conductors are extended through the switching network in the known program controlled electronic switching system. In the embodiment of the invention, three conductors are extended through the switching network. This eliminates the necessity of keeping a record in a temporary memory of the links used in a presently existing connection for tracing purposes and like necessities. In addition, the central controller need not deal with the call supervision and disconnect activities. While a certain amount of flexibility is lost with this three conductor arrangement, this is more than offset by the reduction in memory hardware, execution time, and simplification of the program, all of which provide a special advantage for a central office having a relatively small number of subscribers. With the embodiment of this invention, it is thus possible to reduce the number of commands and the data processing load of the central controller.

In connection with the rotary magnetic memory device, it should be mentioned that this is a substantial improvement over the perforated card and magnetic card memories. Furthermore, the ability to write the data on the rotating device selectively and at a high speed allows some seldom used programs to be kept on a magnetic tape to be rolled into the program store when needed. It is recognized in the magnetic drum memory that its access time is comparatively long relative to that of a random access core memory. However, this relatively long access time results in no appreciable detriment because it is a simple matter to arrange the memory drum equipment so that the available access time thereto is made adequate for such task in a given system. It can further be improved, when required, by using a well-known quick access track.

Scanning of the data on the peripheral element is one of the major functions of the switching control. It is possible to arrange this information on the drum in the order of the equipment numbers given to the respective elements. The test of the state circuits is done in synchronism with the time the read-head appears over the stored data on the drum. If the test of the state circuit shows this reference data to be required, it is gated out immediately as the read-head scans the data. This greatly simplifies and speeds up the task of reading essential data for processing the call.

When two central controllers are used, they operate in reversed modes, each locking the other from a given mode. This does not degrade the service at all when double check is put into practice. From another point of view, the reversed phase operation of the two controllers obviates the chances for one of the central controllers to misuse a peripheral element reserved by the other for a different call. Further more, this manner of operation doubles the call processing capacity. In this connection, it should be mentioned that the time for the call processing operation is of the order of the time for the link setting operation in the present invention thereby requiring both controllers to be engaged in different operations for substantially equal time periods.

By virtue of macrocommands, each fundamental call processing operation is described by a single command. Examples of such commands are the line service request detection, the trunk selection, the link matching, the office code translation, the directory number translation and busy test, the register track hunt, the register service request detection, the register track scanning, the register timing, and the like, which in the above-noted known switching system are executed piecemeal by the central processor. As a consequence of the single command, the number of commands required in the present invention are greatly reduced with consequent reductions in the capacity of the program memory. The number of commands to be carried out in establishing a connection is correspondingly reduced to a point where the memory readout speeds for a magnetic drum are adequate for the purposes.

The specific embodiment of the invention is hereinafter explained with reference to the accompanying drawing under the following headings:

1. SPECIFIC EMBODIMENT

A. general

b. specific example

ii. peripheral equipment

a. switching network and network common circuit

b. trunks and register sender link

iii. network state circuit

iv. magnetic drum and a Portion of CENTRAL CONTROLLER Including TRANSFER CONTROL LOGIC CIRCUITS

V. CENTRAL CONTROLLER

A. control wired logics

b. instruction execution wired logics

c. network controller

d. notes

vi. connecting operation

vii. general notes

the invention is readily understood from the following description taken together with the accompanying drawing in which:

FIGS. 1A and 1B are box diagrams of a telephone switching system including a specific embodiment of the invention;

FIG. 2 is a box diagram of a switching network usable in FIG. 1A;

FIGS. 3A and B and 4 are circuit diagrams of subscribers path selection relays and a portion of a network common circuit used in FIG. 1A;

FIGS. 5A and B are circuit diagrams of portions of the switching network and central controller using A, B and C link state circuits according to the invention in FIGS. 1A and 1B;

FIG. 6 is a circuit diagram of a subscriber's line circuit using a line state circuit according to the invention in FIG. 1A;

FIGS. 7 and 8 are circuit diagrams of speech path conductors in portions of the switching network and network common circuit in FIG. 1A;

FIGS. 9 through 16 are circuit diagrams of trunks using state circuits according to the invention in FIG. 1A;

FIG. 17 is a block diagram of logic controls for the state circuits shown in FIG. 1A;

FIGS. 18A, B and C are circuit diagrams of signal converters used in FIG. 17 and elsewhere;

FIG. 19 is a box diagram of a line state circuit used in FIGS. 1A and 17;

FIG. 20 is a box diagram of a link state circuit used in FIG. 2;

FIGS. 21 through 27 are box diagrams showing different trunk state circuits used in FIGS. 1A and 9 through 16;

FIGS. 28(a) through 28(h) and 29(a) through 29(e) show data formats of memory tracks on a magnetic drum used in FIG. 1B;

FIG. 30 is a logic circuit showing the magnetic drum and a portion of a central controller used in FIG. 1B;

FIG. 31 is a logic circuit embodying common registers used in FIG. 1B;

FIGS. 32 through 37 are logic control circuits used in FIG. 1B;

FIG. 38 shows a logic call command circuit used in FIG. 1B;

FIGS. 39 through 43 are command execution wired logics relating to the line, the trunk, the link, and the translator tracks of the drum used in FIG. 1B;

FIGS. 44 through 48 are wired logic circuits for macrocommands used in FIG. 1B;

FIGS. 49 and 50A and B show command execution wired logic circuits relating to the register track on the drum used in FIG. 1B;

FIG. 51 is a mode change logic circuit usable in FIG. 1B;

FIGS. 52 and 53 show a network controller used in FIG. 1B; and

FIGS. 54 through 60 are flow charts indicating various connection operations available in FIGS. 1A and B.

The first or the first and second digits of each reference numeral used hereinafter serves to identify the figure number pertinent thereto.

FIG. 3A, as well as other figures, illustrates an electromagnetic relay "detached contact" arrangement in which an "x" crossing a line represents a make contact and a horizontal "bar" crossing a line represents a break contact.

DESCRIPTION OF THE SPECIFIC EMBODIMENT

I. SPECIFIC EMBODIMENT

A. general

a. Peripheral Equipment

Referring to FIGS. 1A and B, an electronic controlled switching system used in a telephone switching office in accordance with this invention comprises peripheral equipment 100 interconnecting a multiplicity of subscribers' sets 101 and a plurality of trunk lines 102 leading to other offices (not shown).

The peripheral equipment 100 comprises a switching network 106 including a multiplicity of line circuits (LC) 107 and a main link 108 which has a multiplicity of line-side terminals 108L and a plurality of trunk-side terminals 108T. The line and the trunk-side terminals 108L and 108T are divided into a same number of the respective groups (not illustrated). Each line circuit 107 connects a subscriber's set 101 and a line-side terminal 108L.

The peripheral equipment 100 further comprises a plurality of trunks 109 including a plurality of each of intraoffice trunks (IOT) 111, originating register trunks (ORT) 112, tone trunks (TNT) 113, outgoing trunks (OGT) 114, dial pulse outgoing sender trunks (DPOST) 115, multifrequency outgoing sender trunks (MFOST) 116, dial pulse incoming trunks (DPICT) 117, multifrequency incoming trunks (MFICT) 118, multifrequency incoming register trunks (MFIRT) 119, and others, not shown. The trunks 109 are hereinafter referred to by the alphabetical abbreviations given in the parentheses.

The peripheral equipment 100 also comprises a register sender link (RSL) 120. Each of the trunks IOT has an input terminal on the calling subscriber's side and an output terminal on the called subscriber's side of which terminals both are connected with a pair of trunk-side terminals 108T. Each of the trunks ORT and TNT is connected with one trunk side-terminal 108T. In the embodiment illustrated, a trunk OGT has a local input, a transit input, an outgoing, and a register sender link terminal connected with a trunk and a line-side terminal 108T and 108L, a trunkline 102, and the register sender link 120, respectively. The trunks including DPOST, MFOST, and MFIRT are connected with the register sender link 120. The trunk DPICT is connected with a trunkline 102 and a trunk-side terminal 108T. The trunk MFICT is connected with a trunkline 102, a trunk-side terminal 108T, and the register sender link 120.

The main link 108 comprises a plurality of links 121, each adapted to interconnect a desired one in a group of the line-side terminals 108L and a selected one in a group of the trunk-side terminals 108T, these groups being particular to a link 121. The register sender link 120 connects a trunk OGT with either outgoing sender trunk 115 or 116 and a trunk MFICT with a trunk MFIRT.

The line circuits 107 and the trunks 109 are called herein the unit peripheral equipments. The unit peripheral equipments and the links 121 are similarly termed the peripheral elements. The peripheral elements have the respective equipment numbers. The same kind of trunks 109 has a common trunk group number, except the trunks OGT which have several such numbers according to their use. Trunks 109, associated with register sender link 120, have the respective trunk numbers. The respective groups of the line and the trunk-side terminals 108L and 108T are identified by the line and the trunk link frame numbers, respectively. The line link frame number of a terminal group is contained in common in the equipment numbers of those unit peripheral equipments which are connected with the respective terminals in the group. Likewise, the trunk link frame number of a terminal group is contained in the trunk equipment numbers of the trunks connected with the respective terminals in the group. Each trunk IOT has a pair of equipment numbers on the calling and the called subscriber's sides. Similarly, each trunk OGT has a pair of equipment numbers for the local and the transit input terminals, respectively. These equipment numbers have special significance in the respects mentioned later.

Peripheral equipment 100 further comprises a network common circuit 126 associated with the main and the register sender links 108 and 120. In the manner described later in the succeeding section "(i) Operation," the network common circuit 126 serves to connect a pair of the unit peripheral equipments together through the main link 108 and, as the case may be, a pair of relevant trunks together through the register sender link 120. Peripheral equipment 100 is substantially conventional except slight modifications effected on trunks 109 and network common circuit 126.

b. Central Processor - State Circuits

The switching system further comprises a central processor 130 which, according to the instant invention, consists of a network state circuit (NWSC) 136 including line state circuits (LSC) 137 connected with the respective line circuits LC, link state circuits (LKSC) 138 connected with the respective links 121, and trunk state circuits (TKSC) 139 connected with the respective trunks 109, and an address information decoder 136' associated with the line, the link, and the trunk state circuits 137, 138 and 139. The address information decoder 136', supplied with the address information signals, successively addresses in the manner described in section "(i) Operation", the line, the link and the trunk state circuits 137, 138 and 139, respectively, in compliance with the gate signals also supplied thereto. The remainder of central processor 130 is called the common control equipment. In the manner described later in section "(i) Operation," the state circuits 137, 138 and 139 monitor and temporarily record the busy, the idle, the reserved, the line service requesting, and the like states of the associated line circuits 107, links 121, and trunks 109.

c. Storage Device

Central processor 130 further comprises a magnetic drum 140 in FIG. 1B as a central storage or memory device, on which a plurality of memory tracks are arranged in side-by-side relation such as, for example, a mark track 141, a clock track 142, at least one program track 143, a plurality of command tracks 144, at least one line track 145, a trunk track 146, a link track 147, a translator track 148, a register track 149, and others, not shown. For convenience, tracks other than the mark and the clock tracks 141 and 142 are called the data tracks 143 . . . 149. Furthermore, the command and the register tracks 144 and 149 are termed the short tracks because of the reason mentioned later. Each of the data tracks 143 . . . 149 has a number of work positions, each word consisting of a plurality of bit positions. The number of bits in a word is preferably 32 in view of the amount of the data to be stored in a word, the bit positions being referred to as No.0 . . . No.31 bit positions. With this in mind and in consideration of the dimensions and other factors of a magnetic drum, it is desirable to provide 1,024 words along each of the data tracks 143 . . . 149 except the short tracks 144 and 149, the words being numbered No.0 . . . No.1023 words. The Nos.0 . . . 1023 words are specified by the respective addresses which are in conformity with the word numbers and, when represented in the binary code, are 0000000000 . . . 1111111111, respectively. The command and the register tracks 144 and 149 are preferably provided with 128 and 126 words, respectively, in the manner mentioned below.

Mark track 141 stores a logic "1" datum for producing a mark pulse MARK which indicates the starting point of each of the addresses, namely, the No.0 bit of the No.0 word. Clock track 142 stores logic "1" data which provide clock pulses CPO . . . CP31 for defining the bit positions, respectively. As will appear later, the Nos.0 . . . 31 bit positions of each word are defined by Nos.0 . . . 31 clock pulses CP, respectively. Each of the program tracks 143 stores several trains of commands for controlling the operation of the switching system. Each command track 144 stores a train of commands on a temporary basis in the manner to be described later. The words on the line track 145 store the line data, namely, the directory numbers, the service class, and the like of the respective subscribers. The words on the trunk track 146 store the trunk data, namely, the trunk group numbers, the trunk classes, and, if any, the trunk numbers of the respective trunks 109. The words on the link track 147 store the link data including the line and the trunk-side terminal group numbers of the respective links 121. In this connection, it is mentioned that the links 121 are the junctors when the switching network 106 comprises the line and/or the trunk link frames in the familiar manner. It is preferred to store the line and the like data of the peripheral elements in the words whose addresses are equal to the respective equipment numbers. In this case, the equipment number of trunk (IOT) 111 on the calling subscriber's side is represented by the address and that on the called subscriber's side is stored in the trunk number area. The translator track 148 stores the translation data, such as for determining on the basis of the office code of the called subscriber's directory number, whether the requested connection is an intraoffice, an outgoing, an incoming, or a transit connection. The register track 149 stores the numerical signals and other temporary data relating to processing of the calls on a temporary basis. Tracks other than the short tracks 144 and 149 are normally used for read only purposes except when the data are initially to be stored therein, when the stored data must be changed as a result of a change in the switching system, such as a change in the service class of a local subscriber, or when the stored data are questioned because of repeated misconnections.

The tracks 141 . . . 149 are accompanied by read heads 141R . . . 149R, respectively, which simultaneously read the logic "1" and/or "0" data stored in the corresponding bit positions of the words of the same, common address. The command and the register tracks 144 and 149 are further accompanied by write heads 144W and 149W, respectively. For the remaining tracks, the read heads 141R . . . 143R and 145R . . . 148R may be used as the write heads, respectively. The command write head 144R is so disposed that the data read thereby may be again written by the write head 144W in the command track 144 at a bit position just 128-word length in the rear of the bit position being read. Likewise, the register write head 149W stores the data read by the read head 149R again in the register track 149 at a bit position 126-word length in the rear of the bit position being read. Thus, an access to a desired address is possible for the short tracks 144 and 149 in one-eighth revolution of drum 140. The angular distance between such a write and a read head is determined from the speed of rotation of drum 140, the data density on the track, the access time required by the operation of the switching system, and the amount of the data to be read out. The reason for the still shorter effective length of register track 149 is for the convenience of writing various data at various bit positions. Incidentally, the common address of the words on the short tracks 144 and 149 under access is equal to that address of the words on the other data tracks under simultaneous access in which the most significant three digits in the binary code are excluded. The drum 140 is rotated, for example, at a speed of once during every 20 milliseconds. The read and the write heads are preferably a floating type. The average access time for the long tracks is about 10 milliseconds.

A second storage drum (not shown), identical in structure and operation with storage drum 140, may be provided for standby use.

d. Program Segments and Commands

A train of commands mentioned above is called herein a program segment. The program segments thus define the dial tone connection, the trunk DPICT connection, the trunk MFIRT connection, the intraoffice connection, the outgoing connection, the incoming connection, and the like. A program segment preferably contains contiguous 128 words, most of which store commands. Each program track 143 thus has eight program track sections, each storing a program segment. The program segments are identified by the respective segment addresses determined by the program track number, if there are a plurality of the program tracks, and the program track section number. For example, the segment address is 10110 in the binary code if the program segment is stored in the No.5 (101 in the binary code) program track section of the No.2 (10 in the binary code) program track.

Commands are broadly classified into macrocommands as mentioned hereinbefore and microcommands. Other examples of the macrocommands are a call command (CALL) and the mode change command (MDCG). Examples of the microcommands are a conditional "1" jump, a conditional "0" jump, the command track change, a data transfer, a data store, a data load, and an immediate load command (1JUMP, 0JUMP, CTCG, MOVE, STORE, LOAD, and I-LOAD) as discussed later. The conditional jump commands (1JUMP and 0JUMP) may simultaneously carry out the command track change. Each of the command track change command and the conditional jump commands with the command track change will hereafter be called a track change command. Each command contains an instruction area, a next command address, and at least one parity check bit. The instruction area stores the instruction which defines the particular operation to be performed by central processor 130. The next command address designates the address of the command to be executed next in the normal flow of the program specified by the program segment. The parity check bits, one in the preferred embodiment, serve to check the data in the known manner.

Each program segment contains at least one call command. This designates by the segment address contained in the instruction area a program segment to be executed next and transfers, while the execution of the program segment in one of the command tracks 144 is continued, the designated program segment from the program track 143 to the other of the command tracks 144. Thus, the command tracks 144 usually store two program segments, one of which is in execution and the other for subsequent execution. After the execution of a program segment to an end or when it is found meaningless to further execute the program segment, a track change command contained in the program segment is executed to bring another program segment on the other command track 144 into execution.

The numerical signal for a called subscriber produced by a local subscriber or sent from a preceding office requires real time processing. Therefore, each program segment contains at least one register track scan command for storing the numerical signal in a memory section in the register track 149. In this connection, it should be mentioned that a register track memory section consists of a plurality of words, for example, four words.

e. Central Controller

Central processor 130 still further comprises No.0 and No.1 central controllers 150 and 150', as shown in FIG. 1B, both of which central controllers are identical in circuit structure. Consequently, it is understood that the following description regarding the No.0 central controller 150 also applies to the No.1 central controller 150'.

Central controller 150 normally operates in the normal mode. Otherwise the controller 150 is in the maintenance mode. The normal mode is further classified into the call processing and the link setting modes. While one of the central controllers 150 and 150' is in one of the latter two modes, the second is in the other mode. When the operation of one of the controllers 150 and 150' ends earlier than that of the second, the one controller waits completion of operation of the second and, at the time point of the earliest No.0 clock pulse after the completion, begins to execute a mode change command as explained later. If one of the controllers 150 and 150' encounters a trouble in the switching system, that one controller automatically informs the maintenance personnel of the trouble for the correction thereof, while the second operates in the call processing and the link setting modes in a cyclic manner.

f. Common Registers

The No.0 central controller 150 comprises miscellaneous common registers 160 which are connected with the drum 140 to be loaded with various data supplied from the data source, such as the data tracks 143 . . . 149, selected during execution of commands. The registers 160 are, for example, an accumulator register (ACC) 161, an index register (XREG) 162, at least one buffer register (BUFREG) 163, at least one network buffer register (NWBREG) 164, at least one network control register (NWCTLREG) 165, a network command register (NWCMREG) 166, and a register track buffer register (REGTCKREG) 167. In compliance with the number of the bits in a word, each of the common registers 160, except the network command and the register track buffer registers 166 and 167 preferably has 32 bit positions. The network command register 166 may have 10 bit positions. In comparison with the 126-word length of the register track 149, the register track buffer register 167 has 64 bit positions or two-word length.

g. Wired Logic for Call Processing

The No.0 central controller 150 further comprises an aggregate of instruction execution wired logics 170 (FIG. 1B), an assembly of control wired logics 171 (FIG. 1B) for the latter instruction execution wired logics 170, and a combination of command transfer control logic circuits 172 (FIG. 1B).

The control wired logics 171 receive mark and the clock pulses MARK and CP from drum 140 and the command signals from the command transfer logic circuits 172 and supply the instruction execution wired logics 170 with the instruction signal (INSTSIG) derived from the command to be executed and with the clock pulses and miscellaneous other control signals (CP etc.). Examples of the instruction signals are a call signal CALLSIG, a track change signal TCSIG, and a mode change signal MDCGSIG for the respective commands mentioned in the foregoing Section "(d) Program Segments and Commands" and described in detail later in the next succeeding part "(B) Instruction Execution Wired Logics." The control wired logics 171 furthermore supply the address information signals AINF to the address information decoder 136' (FIG. 1A). The control wired logics 171 still further supply to themselves the next command address derived from the command having just been executed and store therein the command to be subsequently executed.

The instruction execution wired logics 170 comprise a call wired logic 176, a track change wired logic 177, and a mode change wired logic 178. The call wired logic 176 receives a call signal and executes the instruction defined by the call signal to supply the signals obtained thereby to the command transfer logic circuits 172. The track change wired logic 177 likewise receives a track change signal and supplies the signals obtained through execution of the instruction defined by the supplied track change signal to the command transfer logic circuits 172.

The instruction execution wired logics 170 in general receive instruction signals INSTSIG and the clock pulses and miscellaneous other signals CP etc., from the control wired logics 171, the line and the like data from drum 140, and the data loaded in accumulator register 161 and other common registers 160. In compliance with the instruction being executed, wire logics 170 supply the address information gate signals to the address information decoder 136'. Furthermore, wire logics 170 receive information signals RINF from the addressed one of the line, the link, and the trunk state circuits 137, 138 and 139 and supply thereto the supply information signals SINF derived as a result of the execution of the instruction. Still further, wire logics 170 leave in the common registers 160 the data obtained as the results of the instruction execution and supply the data relating to the numerical signals to the register track 149.

Although not depicted in FIG. 1B, the control wire logics 171 contain a sequence controller 181 (FIG. 35), a subsequent command logic circuit 182 (FIG. 37), a bit counter 183 (FIG. 32), a word counter 184 (FIG. 33), a revolution counter 185 (FIG. 34), an address register 186 (FIG. 33), and a command register 187 (FIG. 36) including an instruction register 188 and a next command address register 189. The address register 186, when designated by the instruction execution wired logics 170, successively registers the address information signals AINF generated in the control wired logics 171 from the mark and the clock pulses MARK and CP to represent the addresses under access on drum 140. When the instruction execution wired logics 170 find out the desired peripheral element as described more fully later in section "(i) Operation," the address register 186 (FIG. 33) retains the address of the word containing the data relating to the desired peripheral element. The wired logics 170 subsequently transfer the address thus kept in the address register 186 to one of the common registers 160. As the case may be, index register 162 or network control register 165 produces like address information.

h. Network Controller

The central controller 150 still further comprises a network controller (NWCTL) 196 (FIG. 1B) associated with the network common circuit 126, the common registers 160, and the wired logics 170. The network controller 196 (FIG. 52) is a wired logic for link setting and in turn comprises an idle test circuit 199 connected with the peripheral elements. The idle test circuit 199 (FIG. 53) serves to carry out the double check on the busy/idle states of the peripheral elements reserved during execution of the program. The network controller 196 causes the network common circuit 126 (FIG. 1A) to establish the desired path through the switching network 106 and, as the case may be, through the register sender link 120 in the manner described later in accordance with the data loaded in the network control and the network command registers 165 and 166 (FIG. 1B).

i. Operation

When a local subscriber originates a call by going off-hook in FIG. 6, line state circuit (LSC) 137 connected with the calling subscriber's line circuit 107 is brought into the busy and service requesting state. In due course, the dial tone connection program is transferred to the drum command track 144 FIG. 1B). When the wired logic 170 (FIG. 1B) detects the service requesting state while it successively receives from the drum line track 145 the data relating to the line circuits 107, the wired logic 170 keeps the equipment number of the calling subscriber's line circuit 107 in the address register 186 (FIG. 33) and the line data relating thereto in one of the common registers 160 (FIG. 1B). The wired logic 170 transfers the equipment number to another common register. In compliance with the program, the wired logic 170 selects an idle originating register trunk (ORT) 112 and reserves the same by means of the pertinent trunk state circuit 139. At the same time, the wired logic 170 keeps the equipment number of the selected trunk in the address register 186 and subsequently transfers the same to a common register. The wired logic 170 transfers portions of the subscriber's line and the selected trunk equipment numbers to the accumulator register 161 (FIG. 31). The wired logic 170 compares the data relating to the links 121 (FIG. 1A) successively received from the drum link track 147 with the equipment number portions repeatedly received from the accumulator register 161 to select and reserve, via the link state circuit (LKSC) 138 in FIG. 1A, an idle link among those links which are capable of establishing a path interconnecting the calling subscriber's line circuit 107 and the reserved trunk (ORT) 112. At the same time, the wired logic 170 keeps the link data in the network control register 165 (FIG. 52) for use as a portion of the data for the link setting operation. The wired logic 170 transfers the remaining data for the link setting operation to the network control register 165 and loads the data for the type of connection in the network command register 166 (FIG. 52). Mode change wired logic 178 (FIG. 1B) actuates the central controller 150 into the link setting mode. In accordance with the data in the network control and command registers 165 and 166, the network controller 196 causes the network common circuit 126 to connect the reserved peripheral elements with the idle test circuit 199. After having thus carried out the double check, the network controller 196 (FIG. 52) stimulates the network common circuit 126 to establish the required connection.

When a multifrequency signal call reaches the incoming trunk MFICT 118 from a preceding office, the state circuit (TKSC) 139 is brought into the service requesting state which at this moment shows the busy state of the incoming trunk MFICT. The incoming register trunk MFIRT connection program is transferred to the drum command track 144 in due course. The wired logic 170 detects the incoming service requesting state while successively receiving the data relating to the trunks 109 from the drum trunk track 146. Upon detecting the service requesting state, the wired logic 170 retains the equipment number of the service requesting incoming trunk MFICT in the address register 186 (FIG. 33) and the trunk number thereof in one of the common registers 160 (FIG. 1B). The wired logic 170 transfers these data of the trunk to other common registers 160. In accordance with the program, the wired logic 170 selects an idle trunk MFIRT 119 and reserves the same by means of the pertinent trunk state circuit 139. At the same time, the wired logic 170 keeps the trunk number of the latter trunk in one of the common registers 160. The wired logic 170 transfers these trunk numbers to the network control register 165 (FIG. 52) for use as the data for link setting and loads into the network command register 166 (FIG. 52) the data for designating that the register sender link 120 (FIG. 1A) should be set into operation in this case. The mode-change wired logic 178 (FIG. 1B) actuates the central controller 150 (FIG. 1B) into the link setting operation. The network controller 196 (FIG. 53) causes the network common circuit 126 to connect the service requesting trunk MFICT with the reserved trunk MFIRT according to the trunk numbers.

As the numerical signal reaches either a trunk ORT 112 or a trunk DPICT 117, or a trunk MFIRT 119, the particular trunk state circuit 139 connected therewith converts the dial pulses or the multifrequency signals into the logic signals. In compliance with one of the register track scan commands (FIG. 50A) inserted in various positions in the flow of the programs, the wired logic 170 stores the logic signals in a section of the drum register track 149.

If a local subscriber originates a call to another local subscriber, the intraoffice connection program, when transferred to the drum command track 144 in due course, begins to carry out the call processing for this connection. More particularly, the wired logic 170 detects the service request of the register track section and transfers the data stored in the latter track section to the pertinent common registers 160. The wired logic 170 compares the office codes successively received from the drum translator track 148 with the called subscriber's office code repeatedly received from one of the above-mentioned pertinent registers 160 and determines that the intraoffice trunks (IOT) 111 should be used. The wired logic 170 now compares the directory numbers successively received from the drum line track 145 with the called subscriber's directory number repeatedly received from the last-mentioned pertinent one common register 160 to keep the called subscriber's line equipment number in the address register 186 (FIG. 33) and to reserve, via the particular line state circuit 137, the called subscriber's line circuit. The wired logic 170 transfers the called subscriber's line equipment number to another one of the common registers 160. The wired logic 170 selects an idle intraoffice trunk (IOT) 111 and reserves the same via the pertinent trunk state circuit 139. Also, the wired logic 170 retains the trunk equipment number on the calling subscriber's side in the address register 186 and the trunk equipment number on the called subscriber's side in one of the common registers 160. The wired logic 170 subsequently transfers the last-mentioned two trunk equipment numbers to others of the common registers 160. As in the case of the dial tone connection, the wired logic 170 selects an idle main link 121 (FIG. 1A) for interconnecting the calling subscriber's line circuit 107 and the reserved trunk (IOT) 111 on the calling subscriber's side and reserves the same via the particular link state circuit 138.

The wired logic 170 eventually loads the data of the selected trunk (IOT) 111 into the network buffer register 164. The wired logic 170 again carries out the main link matching for the called subscriber's side and retains the data for the latter link setting operation in the network control register 165. The wired logic 170 loads into the network command register 166 the data for the type of connection which informs the network controller 196 (FIGS. 1B and 52) that an intraoffice connection should be made. The mode change wired logic 178 sets the central controller 150 into the link setting operation. After having carried out the double check as in the case of the dial tone connection, the network controller 196 energizes the network common circuit 126 to establish the connection for the called subscriber's side. The network controller 196 transfers the data for the link setting operation on the calling subscriber's side to the network control register 165. Having carried out the double check, the network controller 196 again energizes the network common circuit 126 to complete the connection on the calling subscriber's side. It is to be noted here that the calling subscriber's line equipment number is stored in the register track 149 and transferred to a portion of one of the common registers 160 for eventual use as a part of the data for the link setting operation.

If a local subscriber originates a call to a subscriber in a remote central office, the call processing operation starts when the outgoing connection program is transferred to the drum command track 144 in due course. As in the intraoffice connection, the wired logic 170 detects the service request to transfer the data stored in the register track section 149 to some of the common registers 160, determines that the outgoing trunks (OGT) 114 should be used, selects an idle one of the latter trunks OGT to reserve the same via the particular trunk state circuit 139, retaining in this case, the trunk number of the reserved latter trunk OGT in one of the common registers 160 and subsequently transferring the trunk equipment and the trunk numbers thus obtained to the network control register 165. Furthermore, the wired logic 170 selects an idle main link 121 with reference to the respective portions of the line and the OGT trunk equipment numbers transferred to the accumulator register 161 (FIG. 31). In compliance with the particular program (FIG. 59), the wired logic 170 selects an idle outgoing sender trunk (DPOST) 115 or (MFOST) 116 and reserves the same by the particular trunk state circuit 139. At this moment, the wired logic 170 retains the trunk number in one of the common registers 160 and thereafter transfers the latter number to the network control register 165. The wired logic 170 now transfers the line equipment number from one of the first-mentioned common registers 160 to the network control register 165 and loads into the network command register 166 the data for operating the main and the register sender links 108 and 120, respectively. After the mode change via wired logic 178 and the double check for the peripheral elements concerned with link setting of the main link 108, the network controller 196 causes the network common circuit 126 to carry out the link setting of the main and the register sender links 108 and 120, respectively.

As the numerical signal reaches either a dial pulse incoming trunk (DPICT) 117 or a multifrequency incoming register trunk (MFIRT) 119, the trunk state circuit 139 connected therewith produces logic signals complying with the dial pulse or the multifrequency signals. In accordance with one of the register track scan commands inserted elsewhere in the flow of the programs (FIGS. 54-60), the wired logic 170 stores the latter logic signals in drum register track 149. The incoming connection program, when transferred to the drum command track 144 in due course, carries out the incoming connection. As in the case of the intraoffice and the outgoing connections, the wired logic 170 detects the service request of the register track 149, verifies with reference to the office code that the call is an incoming one, and selects and reserves the desired line circuit 107 with reference to the directory number of the called subscriber. The flow of the last-mentioned incoming connection program, however, proceeds to the selection and the reservation of the desired main link 121. After the central controller mode change and the double check, the network controller 196 activates the network common circuit 126 to establish the desired path through the main link 108.

B. specific example

in a particular example of one medium size switching system according to the invention, the numbers of the line circuits 107 (FIG. 6) and the trunks 109 (FIG. 1A) would be about two thousand and five hundred, respectively. In this case, the switching network 106 would comprise a line link frame LLF, a plurality of junctors or B links 203, and a trunk link frame TLF as shown in FIG. 2. The line and the trunk link frames have A links and C links, respectively. For such a switching system of the invention, the drum 140 (FIG. 1B) is equipped with No.0 . . . No.3 program tracks (143-0 . . . 143-3), No.0 and No. 1 command tracks (144-0 and 144-1), and No.0 and No.1 line tracks (145-0 and 145-1). Otherwise, the drum 140 includes one each of a mark track 141, a clock track 142, a trunk track 146, a link track 147, a translator track 148, and a register track 149. In this particular example, the common registers 160 (FIG. 1B) include No.0 and No.1 buffer registers (163-0 and 163-1), No.0 and No.1 network buffer registers (164-0 and 164-1), and No.0 and No.1 network control registers (165-0 and 165-1). Otherwise, the common register 160 embodies one each of an accumulator register 161, an index register 162, a network command register 166 and a register track buffer register 167. Furthermore, each set of the data on the drum translator track 168 occupies two words, these two words forming a translator track section. Similarly, each set of the data on the register track 149 requires four words.

II. PERIPHERAL EQUIPMENT

A. switching network and NETWORK COMMON CIRCUIT

a. Switches and Links

Referring to FIG. 2, the switching network 106 of the specific example comprises a plurality of line circuits 107, a line link frame (LLF) 201, a trunk link frame (TLF) 202, and a plurality of B links or junctors 203. The line link frame 201 comprises No.0 through No.7 line link frames LLFO . . . LLF7, each constituting one line link frame 206, and is accomplished by a portion of path selection relays illustrated in FIG. 3. The trunk link frame 202 comprises No.0 through No.7 trunk link frames TLFO . . . TLF7, each constituting one trunk link frame 207, and is accomplished by a portion of path selection relays shown in FIG. 4. Each line link frame 206 comprises No.0 through No.7 primary switches (PSW0 . . . PSW7) 211, No.0 through No.7 secondary switches (SSWO . . . SSW7) 212, and a plurality of A links 213. Each trunk link frame 207 comprises No.0 through No.7 primary switches (PSWO . . . PSW7) 221, No.0 through No.7 secondary switches (SSW0 . . . SSW7) 222, and a plurality of C-links 223. Each switch is a ferreed switch which comprises two-wire speech paths and control wires shown in FIG. 5, and path closing coil arrangement depicted in FIGS. 7 and 8. Each primary switch 211 of the line link frames 206 has No.0 through No.31 vertical lines (LV0 . . . LV31) 231 and No.0 through No.7 horizontal lines. Each line link secondary switch 212 has No.0 through No.7 horizontal lines and No.0 through No.7 vertical lines (JLV0 . . . JLV7) 232. Each trunk link primary switch 221 has No.0 through No.7 vertical lines (JTV0 . . . JTV7) 233 and No.0 through No.7 horizontal lines. Each trunk link secondary switch 222 has No.0 through No.7 horizontal lines and No.0 through No.7 vertical lines (TV0 . . . TV7) 234. Each line link primary switch 211 may be composed of four 8.times.8 ferreed switches, each similar to switches 212, 221 and 222.

The No.0 through No.31 vertical lines 231 of a majority of the line link frame primary switches 211 are connected with the respective line circuits 107. Such vertical lines 231 in other primary switches 211 are connected with the respective outgoing trunks 114. In each line link frame 206, the No.0 through No.7 horizontal lines of the No.0 primary switch (PSW0) 211 are connected with the No.0 horizontal lines of the No.0 through No.7 secondary switches (SSW0 . . . SSW7) 212, respectively, by means of 64 A-links 213. In this pattern, the number of each primary switch (PSW0 . . . PSW7) 211 coincides with the horizontal line number of each of the secondary switches 212 which are interconnected. The No.0 through No.7 vertical lines 232 of the No.0 secondary switch (SSW0) 212 of the No.0 line link frame (LLF0) 206 are connected with the No.0 vertical lines 233 of the No.0 primary switch (PSW0) 221 of each of the No.0 through the No.7 trunk link frames (TLF0 . . . TLF7) 207, respectively, by means of eight B-link junctors 203. In this pattern, the line link secondary switch vertical line number is in one-to-one correspondence with the trunk link frame number, while the line link secondary switch number and the trunk link primary switch number are the same. In each trunk link frame 207 of each of trunk link frames TLF0 . . . TLF7, the No.0 through the No.7 horizontal lines of the No.0 primary switch (PSW0) 221 are connected with the No.0 horizontal lines of the No.0 through the No.7 secondary switches (SSW0 . . . SSW7) 222, respectively, by means of 64 C-links 223. In this pattern also, the primary switch number conforms to the horizontal line number of each of the secondary switches 222. Additional details regarding the ferreed switches may be obtained by referring to the Bell System Technical Journal, supra.

The trunk link secondary switch vertical lines 234 are connected via the known party test and other test arrangement (not shown) with the trunks 109 named above except the multifrequency incoming register and the outgoing sender trunks 119, 115 and 116. Thus, the switching network 106 serves for 2,048 line-side terminals 108L and 512 trunk-side terminals 108T so that the switching network 106 has a concentration ratio of 4:1 and a traffic capacity of 200 Erlangs. Each of the line link primary switch vertical lines 231, each of the A-links, the B-links, and the C-links 213, 203 and 223, and each of the so-called D-lines (not shown here) of the trunks 109 extended near to the trunk link secondary switch vertical lines 234 are coupled via relay contact shown in FIGS. 5A and 5B, and leads 241, 242, 243, 244 and 245 to the idle test circuit 199. According to the instant invention, the line circuits 107 are connected via respective leads 261 to the line state circuits 137 (FIG. 6). Also, the A-links, the B-links, and the C-links 213, 203 and 223, respectively, are connected via leads 262, 263 and 264 with A-link, B-link and C-link state circuits 271, 272 and 273, respectively, which are shown as the link state circuits group 138 in FIG. 1A.

b. Start of Link Set

Referring to FIG. 6, let it be assumed that the No.0 central controller 150 (FIG. 1A) is in operation to initiate the link setting operation as presently explained. A No.0 network action start relay NAS0 (FIG. 3A) connected with a negative battery 310 is operated by the ground effective at relay amplifier 311.1. A plurality of No.0 central control connection relays, such as CC0, are operated by closure of relay contact nas0.sup.0 (nas0.sup.1, ...) and connects all leads between the operating central controller 150 (No.0) and the network common circuit 126 by closed contacts cc0.sup.0 . . . cc0.sup.4. If No.1 central controller 150' (FIG. 1B) takes part, relays, such as NAS1 and CC1, in FIG. 3A are operated to connect all leads between the operating central controller 150' (No. 1) and the network common circuit 126 by the associated closed contacts, not shown, in FIG. 3A. Such lead connection is confirmed by the operating one of central controllers 150 and 150' by the application of ground via the closed contact cc0.sup.0 (or cc1.sup.0, not shown) to a lead 311.2 as hereinafter mentioned in part (C) NETWORK CONTROLLER, section (b). It is to be noted that the data including the line equipment (the line link primary vertical line) number LEN, the line link frame junctor number LJEN, the trunk link frame junctor number T-JEN, and the trunk equipment (the trunk link secondary switch vertical line) number 10 are already stored in the network control registers 165 as hereinbelow explained in part (C) just identified.

c. Line Link Path Selection Relays

Referring further to FIGS. 3A and B, the line link frame 206 and the network common circuit 126 comprise a plurality of line link frame path selection relays which can be divided into 34 groups. A first relay group consists of relays 3LF0 . . . 3LF7 which, when operated, select the No.0 through the No.7 line link frames (LLF0 . . . LLF7) 206, respectively. A second relay group common to the No.0 through the No.7 line link frames (LLFO . . . LLF7) 206 consists of relays 3E0 . . . 3E3. A third relay group consists of relays 3A0 . . . 3A31 which are grouped into four subgroups 3A0 . . . 3A7, 3A8 . . . 3A15 (not shown), 3A16 . . . 3A23 (not shown), and 3A24 . . . 3A31. The four subgroups are operative when the relays 3E0 . . . 3E3 are operated, respectively. Seven similar groups are understood to be included in FIGS. 3A and B, but not shown therein for the purposes of simplification. An eleventh, a nineteenth, and a twenty-seventh group consist of relays 3B0 . . . 3B7, 3C0 . . . 3C7, and relays 3D0 . . . 3D7, respectively. Similar 21 groups of relays are understood to be included in FIGS. 3A and B, but not illustrated for the purpose of simplification. In compliance with the data stored in the network control registers 165 (FIG. 1B), one amplifier in each group of relay amplifiers 311.3 . . . 311.10, 311.11 . . . 311.14, 311.15 . . . 311.22, 311.23 . . . 311.30, 311.31 . . . 311.38, and 311.39 . . . 311.46 supplies ground to the corresponding one of the LF, the E, the A, the B, and C, and the D relays as subsequently explained.

Let it be assumed in FIG. 2 for this explanation that the aforementioned line equipment number identifies the No.0 line link frame LLF0, the No.0 line link primary switch PSW0, and the No.0 line link primary switch vertical line LV0, the line link junctor number specifies the No.0 line link secondary switch LLF SSW0 and the No.0 line link secondary switch vertical line JLVO. In response to the line link frame number LLFO, the 3LFO relay (FIG. 3A) is operated by ground supplied by the relay amplifier 311.3 via the closed contact cc0.sup.1. In compliance with a portion of the line link primary switch vertical line number LV0, the relay 3E0 is operated by ground received via the relay amplifier 311.11 and the closed contact cc0.sup.9. When both relays 3LF0 and 3E0 are operated, the 3A0 through 3A7, the 3B0 through 3B7, the 3C0 through 3C7, and the 3D0 through 3D7 relays for the No.0 line link frame LLF0 are operated because closed contacts 31fo.sup.0 and 3e0.sup.0 extend the negative battery 310 to such relays. The 3A0 through 3A31 relays are selected by means of the coordinate-like arrangement of contacts 31fo.sup.0, 3eo.sup.0, . . . , 3e3.sup.0, . . . , and 3lf7.sup.0, 3e0.sup.7, . . . , 3e3.sup.7. Therefore, in reply to the remaining portion of the line link primary switch vertical line number LV0, the eA0 relay is operated by ground received via the relay amplifier 311.15, the closed contact cc0.sup.13, and a diode 320. In correspondence to the line link primary switch number LLFPSW0, the relay 3B0 is operated by ground received via the relay amplifier 311.23, the closed contact cc0.sup.21, and a diode 360. In conformity to the secondary switch vertical line number JLV0, the relay 3C0 is operated by ground received via the relay amplifier 311.31, the contact cc0.sup.29, and a diode 370. In compliance with the line link secondary switch number SSW0, the relay 3D0 is operated by ground received via the relay driver 311.39, the closed contact cc0.sup.37, and a diode 380.

d. Trunk Link Path Selection Relays

Referring to FIG. 4, the trunk link frame path selection relays can be divided into 33 groups. A first group of such relays consists of 4TF0 . . . 4TF7 relays which, when operated, select the No.0 through No.7 trunk link frames 207, respectively. Among second through thirty-third similar relay groups, the second, the tenth, the eighteenth, and the twenty-sixth groups are illustrated consisting of relays 4A0 . . . 4A7, 4B0 . . . 4B7, 4C0 . . . 4C7, and 4D0 . . . 4D7, respectively. These relays are operated via negative battery 310 in accordance with the data stored in the network control registers 165 (FIG. 1A).

Let it be assumed in FIG. 2 for this explanation that the aforementioned trunk link junctor number identifies the No.0 trunk link frame TLF0, the No.0 trunk link primary switch TLF PSW0, and the No.0 trunk link primary switch vertical line TLF JTV0, the trunk equipment number specifies the No.0 trunk link secondary switch SSW0 and the No.0 trunk link secondary switch vertical line TV0. In response to the trunk link frame number TLF0, the 4TF0 relay is operated by ground received via the relay amplifier 411.47 and the closed contact cc0.sup.45. In reply to the primary switch vertical line number JTV0, the 4A0 relay is operated by ground received via the relay amplifier 411.55, the closed contact cc0.sup.53, and a diode 420. In compliance with the trunk link primary switch number TLF PSW0 the 4B0 relay is operated by ground received via the relay amplifier 411.63, the contact cc0.sup.61, and a diode 430. In conformity to the trunk link secondary switch vertical line number TV0, the 4C0 relay is operated by ground received via the relay amplifier 411.71, the closed contact cc0.sup.69, and a diode 440. In correspondence to the trunk link secondary switch number SSW0, the 4D0 relay is operated by ground received via the relay amplifier 411.79, the closed contact cc0.sup.77, and a diode 450.

e. Speech Path and Control Wire

FIG. 5A shows two-wire speech paths (A and B lines) and control wires (C lines) of the No.0 line link frame LLF0, whose primary switch (PSW0) vertical lines 231 are connected with 256 line circuits 107, respectively, and whose secondary switch (SSW0) vertical lines 232 are connected with the 64 B-link junctors 203, respectively. When the 3A0, the 3B0, the 3C0 and the 3D0 relays are operated, the so-called C-line 501C of the No. 0 vertical line LV0 of the No.0 line link primary switch LLF PSW0 is connected via closed 3a0.sup.0, 3b0.sup.0 and cc0.sup.85 contacts and lead 241 with the idle test circuit 199 (FIG. 5A). Also, the so-called C-line 506C of the A-link 213 connected with the C line of the No.0 horizontal line of the No.0 primary switch PSW0 is connected via closed contacts 3d0.sup.0, 3b0.sup.1 and cc0.sup.86 and the lead 242 with the idle test circuit 199. The state circuit leads 262 (FIG. 2) are connected with the respective C lines such as, for example, line 506C of the links 213.

FIG. 5B shows two-wire speech paths and control wires of the No.0 trunk link frame TLFO, whose primary switch (PSW0) vertical lines 233 are connected with the 64 B-links 203, respectively, and whose secondary switch (SSW0) vertical lines 234 are connected with the miscellaneous trunks 109, respectively. When the 4A0, the 4B0, the 4C0, and the 4D0 relays in FIG. 4 are operated, the C line 511C of a junctor connected with the C line of the No.0 vertical line 233 of the No.0 trunk link primary switch TLF PSW0 is connected via closed contacts 4b0.sup.0, and 4a0.sup.0, and cc0.sup.87 (FIG. 5A) and the lead 243 with the idle test circuit 199. Also, the C-line 516C of the No.0 horizontal line of the No.0 trunk link primary switch PSW0 is connected via closed contacts 4b0.sup.8 and 4d0.sup.0 (FIG. 5B) and cc0.sup.88 and the lead 244 with the idle test circuit 199 in FIG. 5A. In addition, the D-line 521D of the trunk 109 is connected via closed contacts 4c0.sup.0 and 4d0 (FIG. 5B) and cc0.sup.89 and the lead 245 to the idle test circuit 199 in FIG. 5A.

f. Line Circuit 107

Referring to FIG. 6, a line circuit 107 comprises A, B, and C lines 602A, 602B and 602C, respectively, connected with a predetermined one of the vertical lines 231 of a majority of the line link primary switches 211 in FIG. 2. The A and the B-lines 602A and 602B have an A and a B-branch lines 603A and 603B, respectively. The A-branch line 603A terminates at negative battery 604. The B-branch line 603B is connected to lead 261 and to first and second further branch lines 603B1 and 603B2 which latter two lines are extended to ground and a positive battery 605, respectively. The C-line 602C includes the CO relay 6CO connected with another positive battery 606 which may also be the positive battery 605.

When the subscriber's set 101 is in the on-hook state and the line circuit 107 connected thereto is idle, ground is present on the lead 261 and a positive potential from the positive battery 606 is present via the operating winding of relay 6CO on the C-line 602C. When the subscriber goes off-hook to originate a call, a negative potential from the negative battery 604 is applied to the lead 261. The positive potential remains on the C-line 602C. When the requested one of the trunks 109 is seized in compliance with the originated call, ground then placed on the seized trunk 109 is extended via the trunk link frame 202 in FIG. 2, the junctors 203, and the line link frame 201 to the C-line 602C. This ground serves to energize the CO relay 6CO to open contacts 6co.sup.0 and 6co.sup.1 and to close contact 6co.sup.2 whereby a positive potential is applied to the lead 261 for a purpose that is presently mentioned.

When a call reaches the line circuit 107 via the line link frame 201 while the subscriber's set is in the on-hook state, ground placed on the C-line 602C from one of the intraoffice trunks IOT 111 or one of the incoming trunks 117 and 118 operates the CO relay 6CO to apply the positive potential to lead 261 as just stated.

g. Pulse Path

FIGS. 7 and 8 show pulse path closing coil arrangements of the No.0 line and the No.0 trunk link frames LLF0 and TLF0, respectively, together with a No.0 line link, a No.1 line link, a No.0 trunk link, and a No.1 trunk link pulser 700, 701, 800 and 801 for such arrangements. When the idle state of the calling subscriber's line circuit 107 in FIGS. 2 and 6 is confirmed by the idle test circuit 199, ground received via a relay amplifier 711.87 is applied via the closed contact cc0.sup.90 to the operating winding of pulser driving relay 7PA0. Operation of the relay 7PA0 is confirmed by the operating central controller 150 in FIG. 1B via contacts pa0.sup.0 and cc0.sup.91 and a lead 711.88. Other closed contacts pa0.sup.1 and pa0.sup.2 supply ground to trigger the No.0 line and the No.0 trunk link pulsers 700 and 800. Leads 501C and 602C form a single lead having portions appearing in FIGS. 5A and 6, respectively.

The triggered line link pulser 700 supplies a pulse current in a circuit including the contact cc0.sup.92, a lead 711, a closed contact 3a0.sup.8, eight driving coils of the No.0 vertical line LVO of the No.0 line link primary switch LLF PSW0, a lead 712, 32 driving coils of the No.0 horizontal line of the switch PSW0, A link 213, a closed contact 3b0.sup.2, eight driving coils of the No.0 horizontal line of the No.0 line link secondary switch LLFSSWO, a lead 713, eight driving coils of the No.0 vertical line JLVO of the switch SSW0, closed contacts 3c0.sup.0 and 3d0.sup.8, a lead 714, and the closed, contact cc0.sup.93 back to the pulser 700. Thus, as it is well known, the three ferreed contacts at the cross-points of the No.0 vertical and the No.0 horizontal lines of the No.0 primary and the No.0 secondary switches PSW0 and SSW0, respectively, close in the line link frame 201 (FIG. 2) while the contacts at the remaining cross-points thereof continue in the break state thereby obviating other connections. In the like manner, the triggered No.0 trunk link pulser 800 supplies a pulse current in a circuit including the circuit components having the reference numerals and alphabets corresponding to those for the line link pulser 700, to close the ferreed contacts at the cross-points of the No.0 vertical and the No.0 horizontal lines of the No.0 primary and the No.0 secondary switches PSW0 and SSW0, respectively, close in the trunkline frame 202 while the remaining cross-points thereof continue in a break state to obviate other connections. Ground potential supplied via the pulser 700, the closed contact cco.sup.94 and the lead 711.89 indicates the operation of the latter pulser to the central controller 150 in FIG. 1B. The operation of the pulser 800 is indicated to the central controller 150 by ground applied via a closed contact cc0.sup.97 to lead 811.90.

It is noted here that the line circuit 107, when connected with no trunks 109, supplies a positive potential from battery 606 in FIG. 6 to the C-lines 602C and 501C of the latter line circuit and the line link primary switch (PSW0) vertical line 231 in FIG. 5A. When the A-link 213, the B-link 203, and the C-link 223 in FIGS. 5A and B are idle (when no ferreed contacts are closed), no potential is placed on the C-lines 506C, 511C and 516C in FIGS. 5A and B. Each trunk 109 supplies, in the manner described below, a negative potential to the D-line 521D (FIG. 5B) when the former is idle (roughly speaking). As will appear later, the idle test circuit 199 (FIG. 5A) checks these potentials to detect the idle states of the line circuit 107, the A-link 213, the B-link 203, the C-line 223, and a particular one of the trunks 109 specified by the combination of the path selection relays. The idle test circuit 199 also activates the specified one of trunks 109 by sending a ground pulse via lead 245 to the D-line 521D in the manner explained hereinafter.

When the specified one of the trunks 109 is activated, ground is supplied in the manner later described to the D-line 521D (FIG. 5B) of such trunk 109 and to the C-lines 516C, 511C, 506C, and 501C (501C being an extension of C-line 602C) of the C-link 223, the B-link 203, the A-link 213, and the line circuit 107. This is checked in the manner explained below in part (C) NETWORK CONTROLLER, subsection (b), by the idle test circuit 199, which thereby detects completion of the connection between the selected one of the trunks 109 and the subscriber's set 101. Having so detected, the operating central controller 150 removes ground supplied via the relay amplifier 311.1 thereby eventually to release the contacts of the CCO relay to disconnect the network common circuit 126 therefrom. Even after the termination of the conversation, the particular ferreed contacts remain in the closed state until a different combination of the speech path selection relays is operated to complete a different speech path. This extends the positive potential of the positive battery 606 to the C-lines 506C, 511C, and 516C of the A-link 213, the B-link 203, and the C-link 223 even after such links are released from service.

B. trunks and REGISTER SENDER LINK

a. General

FIGS. 9 through 16, inclusive, disclose circuit diagrams of some of the trunks 109 shown in FIG. 1A and described hereinafter. The intraoffice trunks (IOT) 111, the outgoing trunks (OGT) 114, the dial pulse and the multifrequency incoming trunks (DPICT and MFICT) 117 and 118 and the like are concerned with speech transmission and accompany IOT state circuits (IOT SC) 901, OGT state circuits (OGT SC) 1101, DPICT and MFICT state circuits (DPICT SC and MFICT SC) 1401 and 1501, and similar trunk state circuits, respectively. The tone trunks (TNT) 113 and similar trunks, such as talky trunks, serve to send the busy tone and other service signals to the calling subscriber and may accompany simple trunk state circuits explained hereinafter. A talky trunk supplies a preselected and prerecorded talking announcement such, for example, as --the number has been changed--, --the phone has been disconnected--, --incorrect dialing, please repeat your call--, and the like. The originating register trunks (ORT) 112, the multifrequency incoming register trunks (MFIRT) 119, the dial pulse and the multifrequency outgoing sender trunks (DPOST and MFOST) 115 and 116, and others are involved in receiving or transmitting numerical signals and accompany ORT state circuits (ORT SC) 1001, MFIRT state circuits (MFIRT SC) 1601, DPOST and MFOST state circuits (DPOST SC and MFOST SC) 1201 and 1301, and like trunk state circuits, respectively. The trunks 109 have a common negative battery 906. The OGT 114 and the MFICT 118 have a common positive battery 1107. Some trunks, such as the IOT 111, the DPICT 117 and the MFICT 118 have a common ring-back tone generator 9RBT and a common ringing generator 9RG. The tone trunks (TNT) 113 have a common busy tone generator (not shown). The trunks (ORT) 112 have a common dial tone generator 10DT. The trunk state circuits 901 . . . 1601, and so on, are identified as the trunk state circuits (TKSC) 139 in FIG. 1A. The trunks 109 are of the known construction, except suitable circuit means are provided for connecting the respective trunks 109 with the corresponding state circuits as above indicated.

b. Intraoffice Trunk (IOT) 111

FIG. 9 shows each intraoffice trunk (IOT) 111 comprising an input 911 and an output 912 connected with two particular vertical lines 234 of the trunk link secondary switchs 222 in FIGS. 2 and 6, for example. The input 911 includes input terminals connected in corresponding lines 911A, 911B, 911C and 911D, respectively. The lines 911A, B, C and D may be considered extensions of the lines A, B, C and D, respectively, in FIG. 5B. The output 912 comprise output terminals connected in corresponding lines 912A, 912B, 912C and 912D, respectively. The trunk (IOT) 111 provides an information channel extending from a local calling subscriber to a local called subscriber.

It was previously mentioned that prior to the seizing of the trunk (IOT) 111, the idle test circuit 199 (FIG. 5A) determines the busy/idle state of a trunk (IOT) 111 by detecting the potential on the input D-line 911D of such trunk (and thereby the potential on line 912D) so that when such tested trunk is idle, the trunk (IOT) 111 is activated to busy by the idle test circuit 199 which now puts ground on the lines 911D and 912D via the line 521D in FIG. 5B as previously noted. As a result of such activation, the B-relay 9B is operated by negative battery 906 to extend the connection from the calling subscriber's set 101 (FIG. 3) via the switching network 106 (FIGS. 2, 5A and B), the input 911, and closed contacts 9b.sup.0 and 9b.sup.1 to the A-relay 9A for supervising the calling subscriber's loop. Upon the operation of the B-relay 9B, closed contacts 9b.sup.2 and 9b.sup.3 place ground via the respective C-lines 911C and 912C on the C-line 602C of the calling subscriber's line circuit 107 (FIG. 3) and the corresponding C-line 602C in the called subscriber's line, not shown. Also, a transfer contact 9b.sup.4 places ground on the D-lines 911D and 912D. In addition, the audible ringing signal or the ringing tone is inductively transmitted from the ring-back tone generator 9RBT via contacts 9g.sup.0, 9b.sup.5, 9b.sup.0, and 9b.sup.1 and the switching network 106 just identified to the calling subscriber's set 101. Upon operation of the A-relay 9A, the B relay 9B is held in the operated state by a self-holding circuit 914 via contacts 9b.sup.6, 9a.sup.0 and 9da.sup.0 connected to ground. At the same time, the ringing current is delivered from the ringing generator 9RG via a ringing trip relay or F-relay 9F, contacts 9a.sup.1, 9g.sup.1, and 9b.sup.7 and the switching network 106 (FIGS. 2, 5A and B), to the ringing circuit (not shown) of the called subscriber set 101. The ringing current returning via

Current U.S. Class:	379/279 ; 379/280; 379/32.04
Current International Class:	H04Q 3/545 (20060101); H04q 003/54 ()
Field of Search:	179/18ES,18E,18FF